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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2020 Bruno Chianca <brunobcf@gmail.com>
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
18
19#include "periph_cpu.h"
20#include "cfg_clock_32_1.h"
21#include "cfg_rtt_default.h"
22#include "cfg_timer_default.h"
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
35
36static const uart_conf_t uart_config[] = {
37 {
38 .dev = NRF_UARTE0,
39 .rx_pin = GPIO_PIN(0, 25),
40 .tx_pin = GPIO_PIN(0, 24),
41#ifdef MODULE_PERIPH_UART_HW_FC
42 .rts_pin = GPIO_UNDEF,
43 .cts_pin = GPIO_UNDEF,
44#endif
45 .irqn = UARTE0_UART0_IRQn,
46 },
47};
48
49#define UART_0_ISR isr_uart0
50
51#define UART_NUMOF ARRAY_SIZE(uart_config)
53
58static const spi_conf_t spi_config[] = {
59 {
60 .dev = NRF_SPIM0,
61 .sclk = GPIO_PIN(0, 13),
62 .mosi = GPIO_PIN(0, 15),
63 .miso = GPIO_PIN(0, 20),
64 }
65};
66
67#define SPI_NUMOF ARRAY_SIZE(spi_config)
69
74static const i2c_conf_t i2c_config[] = {
75 {
76 .dev = NRF_TWIM1,
77 .scl = GPIO_PIN(0, 14),
78 .sda = GPIO_PIN(0, 16),
79 .speed = I2C_SPEED_NORMAL
80 }
81};
82#define I2C_NUMOF ARRAY_SIZE(i2c_config)
84
85#ifdef __cplusplus
86}
87#endif
88
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:277
Common clock configuration for the nRF52 based boards.
I2C configuration structure.
Definition periph_cpu.h:298
SPI device configuration.
Definition periph_cpu.h:336
UART device configuration.
Definition periph_cpu.h:217