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periph_conf.h File Reference
Boards » NXP FRDM-K22F Board
#include "periph_cpu.h"
+ Include dependency graph for periph_conf.h:
+ This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Clock system configuration

#define CLOCK_CORECLOCK   (60000000ul)
 
#define CLOCK_BUSCLOCK   (CLOCK_CORECLOCK / 2)
 
static const clock_config_t clock_config
 

Timer configuration

#define PIT_NUMOF   (2U)
 
#define PIT_CONFIG
 
#define LPTMR_NUMOF   (1U)
 
#define LPTMR_CONFIG
 
#define TIMER_NUMOF   ((PIT_NUMOF) + (LPTMR_NUMOF))
 
#define PIT_BASECLOCK   (CLOCK_BUSCLOCK)
 
#define PIT_ISR_0   isr_pit1
 
#define PIT_ISR_1   isr_pit3
 
#define LPTMR_ISR_0   isr_lptmr0
 

UART configuration

#define UART_0_ISR   (isr_uart1_rx_tx)
 
#define UART_1_ISR   (isr_uart0_rx_tx)
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

ADC configuration

#define ADC_NUMOF   ARRAY_SIZE(adc_config)
 
#define ADC_REF_SETTING   0
 
static const adc_conf_t adc_config []
 

PWM configuration

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)
 
static const pwm_conf_t pwm_config []
 

SPI configuration

Clock configuration values based on the configured 48Mhz module clock.

Auto-generated by: cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const uint32_t spi_clk_config []
 
static const spi_conf_t spi_config []
 

I2C configuration

#define I2C_NUMOF   ARRAY_SIZE(i2c_config)
 
#define I2C_0_ISR   (isr_i2c0)
 
#define I2C_1_ISR   (isr_i2c1)
 
static const i2c_conf_t i2c_config []
 

Macro Definition Documentation

◆ ADC_NUMOF

#define ADC_NUMOF   ARRAY_SIZE(adc_config)

Definition at line 192 of file periph_conf.h.

◆ ADC_REF_SETTING

#define ADC_REF_SETTING   0

Definition at line 199 of file periph_conf.h.

◆ CLOCK_BUSCLOCK

#define CLOCK_BUSCLOCK   (CLOCK_CORECLOCK / 2)

Definition at line 62 of file periph_conf.h.

◆ CLOCK_CORECLOCK

#define CLOCK_CORECLOCK   (60000000ul)

Definition at line 61 of file periph_conf.h.

◆ I2C_0_ISR

#define I2C_0_ISR   (isr_i2c0)

Definition at line 303 of file periph_conf.h.

◆ I2C_1_ISR

#define I2C_1_ISR   (isr_i2c1)

Definition at line 304 of file periph_conf.h.

◆ I2C_NUMOF

#define I2C_NUMOF   ARRAY_SIZE(i2c_config)

Definition at line 302 of file periph_conf.h.

◆ LPTMR_CONFIG

#define LPTMR_CONFIG
Value:
{ \
{ \
.dev = LPTMR0, \
.irqn = LPTMR0_IRQn, \
.src = 2, \
.base_freq = 32768u, \
}, \
}

Definition at line 81 of file periph_conf.h.

◆ LPTMR_ISR_0

#define LPTMR_ISR_0   isr_lptmr0

Definition at line 94 of file periph_conf.h.

◆ LPTMR_NUMOF

#define LPTMR_NUMOF   (1U)

Definition at line 80 of file periph_conf.h.

◆ PIT_BASECLOCK

#define PIT_BASECLOCK   (CLOCK_BUSCLOCK)

Definition at line 91 of file periph_conf.h.

◆ PIT_CONFIG

#define PIT_CONFIG
Value:
{ \
{ \
.prescaler_ch = 0, \
.count_ch = 1, \
}, \
{ \
.prescaler_ch = 2, \
.count_ch = 3, \
}, \
}

Definition at line 70 of file periph_conf.h.

◆ PIT_ISR_0

#define PIT_ISR_0   isr_pit1

Definition at line 92 of file periph_conf.h.

◆ PIT_ISR_1

#define PIT_ISR_1   isr_pit3

Definition at line 93 of file periph_conf.h.

◆ PIT_NUMOF

#define PIT_NUMOF   (2U)

Definition at line 69 of file periph_conf.h.

◆ PWM_NUMOF

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)

Definition at line 219 of file periph_conf.h.

◆ SPI_NUMOF

#define SPI_NUMOF   ARRAY_SIZE(spi_config)

Definition at line 283 of file periph_conf.h.

◆ TIMER_NUMOF

#define TIMER_NUMOF   ((PIT_NUMOF) + (LPTMR_NUMOF))

Definition at line 89 of file periph_conf.h.

◆ UART_0_ISR

#define UART_0_ISR   (isr_uart1_rx_tx)

Definition at line 130 of file periph_conf.h.

◆ UART_1_ISR

#define UART_1_ISR   (isr_uart0_rx_tx)

Definition at line 131 of file periph_conf.h.

◆ UART_NUMOF

#define UART_NUMOF   ARRAY_SIZE(uart_config)

Definition at line 133 of file periph_conf.h.

Variable Documentation

◆ adc_config

const adc_conf_t adc_config[]
static

Definition at line 140 of file periph_conf.h.

◆ clock_config

const clock_config_t clock_config
static
Initial value:
= {
.clkdiv1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) |
SIM_CLKDIV1_OUTDIV3(2) | SIM_CLKDIV1_OUTDIV4(2),
.rtc_clc = 0,
.osc32ksel = SIM_SOPT1_OSC32KSEL(2),
.clock_flags =
KINETIS_CLOCK_OSC0_EN |
KINETIS_CLOCK_RTCOSC_EN |
KINETIS_CLOCK_USE_FAST_IRC |
0,
.default_mode = KINETIS_MCG_MODE_FEE,
.erc_range = KINETIS_MCG_ERC_RANGE_HIGH,
.osc_clc = 0,
.oscsel = MCG_C7_OSCSEL(0),
.fcrdiv = MCG_SC_FCRDIV(0),
.fll_frdiv = MCG_C1_FRDIV(0b011),
.fll_factor_fei = KINETIS_MCG_FLL_FACTOR_1464,
.fll_factor_fee = KINETIS_MCG_FLL_FACTOR_1920,
.pll_prdiv = MCG_C5_PRDIV0(0b00011),
.pll_vdiv = MCG_C6_VDIV0(0b00110),
}

Definition at line 31 of file periph_conf.h.

◆ i2c_config

const i2c_conf_t i2c_config[]
static
Initial value:
= {
{
.i2c = I2C0,
.scl_pin = GPIO_PIN(PORT_B, 2),
.sda_pin = GPIO_PIN(PORT_B, 3),
.freq = CLOCK_BUSCLOCK,
.speed = I2C_SPEED_FAST,
.irqn = I2C0_IRQn,
.scl_pcr = (PORT_PCR_MUX(2) | PORT_PCR_ODE_MASK),
.sda_pcr = (PORT_PCR_MUX(2) | PORT_PCR_ODE_MASK),
},
}
PORT_B
@ PORT_B
port B
Definition periph_cpu.h:44
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:42
I2C_SPEED_FAST
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition periph_cpu.h:275
CLOCK_BUSCLOCK
#define CLOCK_BUSCLOCK
Bus clock frequency, used by several hardware modules in Kinetis CPUs.
Definition mcg.h:143

Definition at line 290 of file periph_conf.h.

◆ pwm_config

const pwm_conf_t pwm_config[]
static
Initial value:
= {
{
.ftm = FTM0,
.chan = {
{ .pin = GPIO_PIN(PORT_A, 1), .af = 3, .ftm_chan = 6 },
{ .pin = GPIO_PIN(PORT_A, 2), .af = 3, .ftm_chan = 7 },
{ .pin = GPIO_PIN(PORT_D, 5), .af = 4, .ftm_chan = 5 },
},
.chan_numof = 3,
.ftm_num = 0
}
}
PORT_A
@ PORT_A
port A
Definition periph_cpu.h:43
PORT_D
@ PORT_D
port D
Definition periph_cpu.h:46

Definition at line 206 of file periph_conf.h.

◆ spi_clk_config

const uint32_t spi_clk_config[]
static

Definition at line 232 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = SPI0,
.pin_miso = GPIO_PIN(PORT_D, 3),
.pin_mosi = GPIO_PIN(PORT_D, 2),
.pin_clk = GPIO_PIN(PORT_D, 1),
.pin_cs = {
GPIO_PIN(PORT_C, 4),
GPIO_PIN(PORT_D, 4),
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF
},
.pcr = GPIO_AF_2,
.simmask = SIM_SCGC6_SPI0_MASK
}
}
PORT_C
@ PORT_C
port C
Definition periph_cpu.h:45
SPI_CS_UNDEF
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition periph_cpu.h:359

Definition at line 265 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static
Initial value:
= {
{
.dev = UART1,
.freq = CLOCK_CORECLOCK,
.pin_rx = GPIO_PIN(PORT_E, 1),
.pin_tx = GPIO_PIN(PORT_E, 0),
.pcr_rx = PORT_PCR_MUX(3),
.pcr_tx = PORT_PCR_MUX(3),
.irqn = UART1_RX_TX_IRQn,
.scgc_addr = &SIM->SCGC4,
.scgc_bit = SIM_SCGC4_UART1_SHIFT,
.mode = UART_MODE_8N1,
.type = KINETIS_UART,
},
{
.dev = UART0,
.freq = CLOCK_CORECLOCK,
.pin_rx = GPIO_PIN(PORT_D, 6),
.pin_tx = GPIO_PIN(PORT_D, 7),
.pcr_rx = PORT_PCR_MUX(3),
.pcr_tx = PORT_PCR_MUX(3),
.irqn = UART0_RX_TX_IRQn,
.scgc_addr = &SIM->SCGC4,
.scgc_bit = SIM_SCGC4_UART0_SHIFT,
.mode = UART_MODE_8N1,
.type = KINETIS_UART,
},
}
CLOCK_CORECLOCK
#define CLOCK_CORECLOCK
Clock configuration.
Definition periph_cpu.h:28
PORT_E
@ PORT_E
port E
Definition periph_cpu.h:47
UART0
#define UART0
UART0 register bank.
Definition cc26xx_cc13xx_uart.h:130
UART1
#define UART1
UART1 register bank.
Definition cc26xx_cc13xx_uart.h:134
KINETIS_UART
@ KINETIS_UART
Kinetis UART module type.
Definition periph_cpu.h:534
UART_MODE_8N1
@ UART_MODE_8N1
8 data bits, no parity, 1 stop bit
Definition periph_cpu.h:290

Definition at line 101 of file periph_conf.h.