18#include "periph_cpu.h"
29static const clock_config_t clock_config = {
37 .clkdiv1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV4(0),
39 .rtc_clc = RTC_CR_SC8P_MASK | RTC_CR_SC4P_MASK,
41 .osc32ksel = SIM_SOPT1_OSC32KSEL(0),
43 KINETIS_CLOCK_RTCOSC_EN |
44 KINETIS_CLOCK_USE_FAST_IRC |
45 KINETIS_CLOCK_MCGIRCLK_EN |
46 KINETIS_CLOCK_MCGIRCLK_STOP_EN |
49 .default_mode = KINETIS_MCG_MODE_LIRC8M,
51 .erc_range = KINETIS_MCG_ERC_RANGE_LOW,
53 .fcrdiv = MCG_SC_FCRDIV(0),
54 .lirc_div2 = MCG_MC_LIRC_DIV2(0),
56#define CLOCK_CORECLOCK ( 8000000ul)
57#define CLOCK_MCGIRCLK ( 8000000ul)
58#define CLOCK_BUSCLOCK (CLOCK_CORECLOCK / 1)
72#define LPTMR_NUMOF (1U)
73#define LPTMR_CONFIG { \
76 .irqn = LPTMR0_IRQn, \
78 .base_freq = 32768u, \
81#define TIMER_NUMOF ((PIT_NUMOF) + (LPTMR_NUMOF))
83#define PIT_BASECLOCK (CLOCK_BUSCLOCK)
84#define PIT_ISR_0 isr_pit1
85#define LPTMR_ISR_0 isr_lptmr0
95 .freq = CLOCK_MCGIRCLK,
98 .pcr_rx = PORT_PCR_MUX(2),
99 .pcr_tx = PORT_PCR_MUX(2),
100 .irqn = LPUART0_IRQn,
101 .scgc_addr = &SIM->SCGC5,
102 .scgc_bit = SIM_SCGC5_LPUART0_SHIFT,
107#define UART_NUMOF ARRAY_SIZE(uart_config)
108#define LPUART_0_ISR isr_lpuart0
110#define LPUART_0_SRC 3
127#define ADC_NUMOF ARRAY_SIZE(adc_config)
134#define ADC_REF_SETTING 0
149 .scl_pcr = (PORT_PCR_MUX(5)),
150 .sda_pcr = (PORT_PCR_MUX(5)),
159 .scl_pcr = (PORT_PCR_MUX(6)),
160 .sda_pcr = (PORT_PCR_MUX(6)),
163#define I2C_NUMOF ARRAY_SIZE(i2c_config)
164#define I2C_0_ISR isr_i2c0
165#define I2C_1_ISR isr_i2c1
#define CLOCK_CORECLOCK
Clock configuration.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
@ KINETIS_LPUART
Kinetis Low-power UART (LPUART) module type.
@ UART_MODE_8N1
8 data bits, no parity, 1 stop bit
#define ADC_AVG_MAX
Maximum hardware averaging (32 samples)
ADC device configuration.
I2C configuration structure.
UART device configuration.