Configuration of CPU peripherals for the Atmel SAM R21 Xplained Pro board.
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#include <stdint.h>
#include "cpu.h"
#include "periph_cpu.h"
Go to the source code of this file.
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There are three choices for selection of CORECLOCK:
- usage of the 48 MHz DFLL fed by external oscillator running at 32 kHz
- usage of the PLL fed by the internal 8MHz oscillator divided by 8
- usage of the internal 8MHz oscillator directly, divided by N if needed
The PLL option allows for the usage of a wider frequency range and a more stable clock with less jitter. This is why this option is default.
The target frequency is computed from the PLL multiplier and the PLL divisor. Use the following formula to compute your values:
CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV
NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL frequency is 96MHz. So PLL_MULL must be between 31 and 95!
The internal Oscillator used directly can lead to a slightly better power efficiency to the cost of a less stable clock. Use this option when you know what you are doing! The actual core frequency is adjusted as follows:
CORECLOCK = 8MHz / DIV
NOTE: A core clock frequency below 1MHz is not recommended
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| #define | CLOCK_USE_PLL (1) |
| |
| #define | CLOCK_USE_XOSC32_DFLL (0) |
| |
| #define | GEN2_ULP32K (0) |
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| #define | CLOCK_DIV (1U) |
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| #define | CLOCK_CORECLOCK (8000000 / CLOCK_DIV) |
| |
◆ ADC_GAIN_FACTOR_DEFAULT
| #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X |
◆ ADC_NEG_INPUT
| #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND |
◆ ADC_NUMOF
◆ ADC_PRESCALER
| #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512 |
◆ ADC_REF_DEFAULT
| #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V |
◆ CLOCK_CORECLOCK
| #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV) |
◆ CLOCK_DIV
◆ CLOCK_USE_PLL
| #define CLOCK_USE_PLL (1) |
◆ CLOCK_USE_XOSC32_DFLL
| #define CLOCK_USE_XOSC32_DFLL (0) |
◆ GEN2_ULP32K
◆ I2C_NUMOF
◆ PWM_0_EN
◆ PWM_1_EN
◆ PWM_NUMOF
◆ RTT_FREQUENCY
| #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */ |
◆ RTT_MIN_OFFSET
| #define RTT_MIN_OFFSET (10U) |
◆ SPI_NUMOF
◆ TIMER_0_ISR
| #define TIMER_0_ISR isr_tc3 |
◆ TIMER_0_MAX_VALUE
| #define TIMER_0_MAX_VALUE 0xffff |
◆ TIMER_1_ISR
| #define TIMER_1_ISR isr_tc4 |
◆ TIMER_NUMOF
◆ UART_0_ISR
| #define UART_0_ISR isr_sercom0 |
◆ UART_1_ISR
| #define UART_1_ISR isr_sercom5 |
◆ UART_NUMOF
◆ adc_channels
Initial value:= {
}
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
#define ADC_INPUTCTRL_MUXPOS_PA06
Alias for PIN6.
Definition at line 317 of file periph_conf.h.
◆ i2c_config
Initial value:= {
{
.dev = &(SERCOM3->I2CM),
}
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
@ I2C_FLAG_NONE
No flags set.
@ GPIO_MUX_D
select peripheral function D
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition at line 281 of file periph_conf.h.
◆ pwm_config
◆ sam_usbdev_config
Initial value:= {
{
.device = &USB->DEVICE,
}
}
@ GPIO_MUX_G
select peripheral function G
Definition at line 330 of file periph_conf.h.
◆ spi_config
◆ timer_config
Initial value:= {
{
.dev = TC3,
.irq = TC3_IRQn,
.pm_mask = PM_APBCMASK_TC3,
.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
.flags = TC_CTRLA_MODE_COUNT16,
},
{
.dev = TC4,
.irq = TC4_IRQn,
.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
.flags = TC_CTRLA_MODE_COUNT32,
}
}
Definition at line 100 of file periph_conf.h.
◆ uart_config
Include dependency graph for periph_conf.h: