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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2015-2020 Freie Universität Berlin
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
18
19#include "cpu.h"
20#include "periph_cpu.h"
21#include "em_cmu.h"
22#include "usbdev_cfg_otg_fs.h"
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
32#ifndef CLOCK_HF
33#define CLOCK_HF cmuSelect_HFXO
34#endif
35#ifndef CLOCK_CORE_DIV
36#define CLOCK_CORE_DIV cmuClkDiv_1
37#endif
38#ifndef CLOCK_LFA
39#define CLOCK_LFA cmuSelect_LFXO
40#endif
41#ifndef CLOCK_LFB
42#define CLOCK_LFB cmuSelect_LFXO
43#endif
44#ifndef CLOCK_LFE
45#define CLOCK_LFE cmuSelect_LFXO
46#endif
48
53static const adc_conf_t adc_config[] = {
54 {
55 .dev = ADC0,
56 .cmu = cmuClock_ADC0,
57 }
58};
59
60static const adc_chan_conf_t adc_channel_config[] = {
61 {
62 .dev = 0,
63 .input = adcPosSelTEMP,
64 .reference = adcRef1V25,
65 .acq_time = adcAcqTime8
66 },
67 {
68 .dev = 0,
69 .input = adcPosSelAVDD,
70 .reference = adcRef5V,
71 .acq_time = adcAcqTime8
72 }
73};
74
75#define ADC_DEV_NUMOF ARRAY_SIZE(adc_config)
76#define ADC_NUMOF ARRAY_SIZE(adc_channel_config)
78
83static const dac_conf_t dac_config[] = {
84 {
85 .dev = VDAC0,
86 .ref = vdacRefAvdd,
87 .cmu = cmuClock_VDAC0,
88 },
89};
90
91static const dac_chan_conf_t dac_channel_config[] = {
92 {
93 .dev = 0,
94 .index = 0,
95 },
96};
97
98#define DAC_DEV_NUMOF ARRAY_SIZE(dac_config)
99#define DAC_NUMOF ARRAY_SIZE(dac_channel_config)
101
106static const i2c_conf_t i2c_config[] = {
107 {
108 .dev = I2C0,
109 .sda_pin = GPIO_PIN(PC, 0),
110 .scl_pin = GPIO_PIN(PC, 1),
111 .loc = I2C_ROUTELOC0_SDALOC_LOC4 |
112 I2C_ROUTELOC0_SCLLOC_LOC4,
113 .speed = I2C_SPEED_NORMAL,
114 .cmu = cmuClock_I2C0,
115 .irq = I2C0_IRQn,
116 .use_internal_pull_ups = true
117 },
118 {
119 .dev = I2C1,
120 .sda_pin = GPIO_PIN(PC, 4),
121 .scl_pin = GPIO_PIN(PC, 5),
122 .loc = I2C_ROUTELOC0_SDALOC_LOC0 |
123 I2C_ROUTELOC0_SCLLOC_LOC0,
124 .speed = I2C_SPEED_NORMAL,
125 .cmu = cmuClock_I2C1,
126 .irq = I2C1_IRQn,
127 .use_internal_pull_ups = true
128 },
129 {
130 .dev = I2C2,
131 .sda_pin = GPIO_PIN(PI, 4),
132 .scl_pin = GPIO_PIN(PI, 5),
133 .loc = I2C_ROUTELOC0_SDALOC_LOC7 |
134 I2C_ROUTELOC0_SCLLOC_LOC7,
135 .speed = I2C_SPEED_NORMAL,
136 .cmu = cmuClock_I2C2,
137 .irq = I2C2_IRQn,
138 .use_internal_pull_ups = true
139 }
140};
141
142#define I2C_NUMOF ARRAY_SIZE(i2c_config)
143#define I2C_0_ISR isr_i2c0
144#define I2C_1_ISR isr_i2c1
145#define I2C_2_ISR isr_i2c2
147
152#ifndef RTT_FREQUENCY
153#define RTT_FREQUENCY (1U)
154#endif
156
161static const spi_dev_t spi_config[] = {
162 {
163 .dev = USART0,
164 .mosi_pin = GPIO_PIN(PE, 10),
165 .miso_pin = GPIO_PIN(PE, 11),
166 .clk_pin = GPIO_PIN(PE, 12),
167 .loc = USART_ROUTELOC0_TXLOC_LOC0 |
168 USART_ROUTELOC0_RXLOC_LOC0 |
169 USART_ROUTELOC0_CLKLOC_LOC0,
170 .cmu = cmuClock_USART0,
171 .irq = USART0_RX_IRQn
172 },
173 {
174 .dev = USART1,
175 .mosi_pin = GPIO_PIN(PA, 14),
176 .miso_pin = GPIO_PIN(PC, 2),
177 .clk_pin = GPIO_PIN(PC, 15),
178 .loc = USART_ROUTELOC0_TXLOC_LOC6 |
179 USART_ROUTELOC0_RXLOC_LOC4 |
180 USART_ROUTELOC0_CLKLOC_LOC3,
181 .cmu = cmuClock_USART1,
182 .irq = USART1_RX_IRQn
183 }
184};
185
186#define SPI_NUMOF ARRAY_SIZE(spi_config)
188
195static const timer_conf_t timer_config[] = {
196 {
197 .prescaler = {
198 .dev = WTIMER0,
199 .cmu = cmuClock_WTIMER0
200 },
201 .timer = {
202 .dev = WTIMER1,
203 .cmu = cmuClock_WTIMER1
204 },
205 .irq = WTIMER1_IRQn,
206 .channel_numof = 3
207 },
208 {
209 .prescaler = {
210 .dev = TIMER0,
211 .cmu = cmuClock_TIMER0
212 },
213 .timer = {
214 .dev = TIMER1,
215 .cmu = cmuClock_TIMER1
216 },
217 .irq = TIMER1_IRQn,
218 .channel_numof = 3
219 },
220 {
221 .prescaler = {
222 .dev = NULL,
223 .cmu = cmuClock_LETIMER0
224 },
225 .timer = {
226 .dev = LETIMER0,
227 .cmu = cmuClock_LETIMER0
228 },
229 .irq = LETIMER0_IRQn,
230 .channel_numof = 2
231 }
232};
233
234#define TIMER_NUMOF ARRAY_SIZE(timer_config)
235#define TIMER_0_ISR isr_wtimer1
236#define TIMER_1_ISR isr_timer1
237#define TIMER_2_ISR isr_letimer0
239
244static const uart_conf_t uart_config[] = {
245 {
246 .dev = USART4,
247 .rx_pin = GPIO_PIN(PH, 5),
248 .tx_pin = GPIO_PIN(PH, 4),
249 .loc = USART_ROUTELOC0_RXLOC_LOC4 |
250 USART_ROUTELOC0_TXLOC_LOC4,
251 .cmu = cmuClock_USART4,
252 .irq = USART4_RX_IRQn,
253 },
254 {
255 .dev = USART5,
256 .rx_pin = GPIO_PIN(PE, 9),
257 .tx_pin = GPIO_PIN(PE, 8),
258 .loc = USART_ROUTELOC0_RXLOC_LOC4 |
259 USART_ROUTELOC0_TXLOC_LOC4,
260 .cmu = cmuClock_USART5,
261 .irq = USART5_RX_IRQn,
262 }
263};
264
265#define UART_NUMOF ARRAY_SIZE(uart_config)
266#define UART_0_ISR_RX isr_usart4_rx
267#define UART_1_ISR_RX isr_usart5_rx
269
270#ifdef __cplusplus
271}
272#endif
273
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:42
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:274
@ PC
port C
@ PA
port A
ADC channel configuration.
Definition periph_cpu.h:382
ADC device configuration.
Definition periph_cpu.h:374
DAC line configuration data.
Definition periph_cpu.h:297
I2C configuration structure.
Definition periph_cpu.h:295
SPI device configuration.
Definition periph_cpu.h:514
Timer device configuration.
Definition periph_cpu.h:260
UART device configuration.
Definition periph_cpu.h:214
Common configuration for EFM32 OTG FS peripheral.