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periph_cpu.h
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1/*
2 * SPDX-FileCopyrightText: 2022 Gunar Schorcht
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
17
18#include <stdbool.h>
19#include <stdint.h>
20#include "sdkconfig.h"
21#include "hal/ledc_types.h"
22#include "hal/spi_types.h"
23#include "soc/ledc_struct.h"
24#include "soc/periph_defs.h"
25#include "soc/soc_caps.h"
26
27#include "modules.h"
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
36#define STDIO_UART_DEV CONFIG_ESP_CONSOLE_UART_NUM
37
42#define PROVIDES_PM_SET_LOWEST
43#define PROVIDES_PM_RESTART
44#define PROVIDES_PM_OFF
45#define PROVIDES_PM_LAYERED_OFF
46
50#define PM_NUM_MODES (3U)
51
56#define ESP_PM_MODEM_SLEEP (2U)
57#define ESP_PM_LIGHT_SLEEP (1U)
58#define ESP_PM_DEEP_SLEEP (0U)
60
62
66#if defined(CPU_FAM_ESP32H2) && defined(CONFIG_IEEE802154_ENABLED)
67/* ESP32H2 has IEEE802.15.4 radio which has an EUI64 address. Function
68 * esp_efuse_mac_get_default will return this 8 byte address if
69 * CONFIG_IEEE802154_ENABLED */
70# define CPUID_LEN (8U)
71#else
72# define CPUID_LEN (6U)
73#endif
74
79
86#define HAVE_GPIO_T
87typedef unsigned int gpio_t;
89
94#define GPIO_UNDEF (0xffffffff)
96
101#define GPIO_PIN(x, y) ((x << 5) | y)
103
108#define PORT_GPIO (0)
110
115#define GPIO_PIN_NUMOF (SOC_GPIO_PIN_COUNT)
117
118#ifndef DOXYGEN
124#define HAVE_GPIO_FLANK_T
125typedef enum {
126 GPIO_NONE,
127 GPIO_RISING,
128 GPIO_FALLING,
129 GPIO_BOTH,
130 GPIO_LOW,
131 GPIO_HIGH
134
140#define HAVE_GPIO_MODE_T
141typedef enum {
142 GPIO_IN,
143 GPIO_IN_PD,
144 GPIO_IN_PU,
145 GPIO_OUT,
146 GPIO_OD,
147 GPIO_OD_PU,
148 GPIO_IN_OUT,
149 GPIO_IN_OD,
150 GPIO_IN_OD_PU
153
154/* BEGIN: GPIO LL overwrites */
155
156#if SOC_GPIO_PIN_COUNT > 32
157# define GPIO_PORT_NUMOF 2
158# define GPIO_PORT_0 0
159# define GPIO_PORT_1 1
160# define GPIO_PORT_0_PIN_NUMOF (32)
161# define GPIO_PORT_1_PIN_NUMOF (SOC_GPIO_PIN_COUNT - 32)
162# define GPIO_PORT_PIN_NUMOF(p) ((p == GPIO_PORT_0) ? GPIO_PORT_0_PIN_NUMOF \
163 : GPIO_PORT_1_PIN_NUMOF)
164#else
165# define GPIO_PORT_NUMOF 1
166# define GPIO_PORT_0 0
167# define GPIO_PORT_0_PIN_NUMOF (SOC_GPIO_PIN_COUNT)
168# define GPIO_PORT_PIN_NUMOF(p) ((p == GPIO_PORT_0) ? GPIO_PORT_0_PIN_NUMOF : 0)
169#endif
170
171#define HAVE_GPIO_PORT_T
172typedef uintptr_t gpio_port_t;
173
174#define HAVE_GPIO_SLEW_T
175typedef enum {
177 GPIO_SLEW_SLOW = 0,
178 GPIO_SLEW_FAST = 0,
181
182#define HAVE_GPIO_PULL_STRENGTH_T
183typedef enum {
185 GPIO_PULL_WEAK = 0,
189
190/*
191 * This include is placed here by intention to avoid type name conflicts.
192 * Having the macros HAVE_GPIO_* defined before including this file allows to
193 * use these macros in `hal/gpio_types.h` to decide whether to use the
194 * ESP-IDF types when compiling ESP-IDF modules or to use the RIOT types
195 * when compiling RIOT source code.
196 */
197#include "hal/gpio_types.h"
198
199#define HAVE_GPIO_PULL_T
200typedef gpio_pull_mode_t gpio_pull_t;
201#define GPIO_PULL_UP GPIO_PULLUP_ONLY
202#define GPIO_PULL_DOWN GPIO_PULLDOWN_ONLY
203#define GPIO_PULL_KEEP GPIO_PULLUP_PULLDOWN
204
208#define HAVE_GPIO_DRIVE_STRENGTH_T
209typedef enum {
211 GPIO_DRIVE_WEAK = 1,
215
216/*
217 * @brief Map former enumeration values the new enumeration values for compatibility.
218 */
219#define GPIO_DRIVE_5 GPIO_DRIVE_WEAKEST
220#define GPIO_DRIVE_10 GPIO_DRIVE_WEAK
221#define GPIO_DRIVE_20 GPIO_DRIVE_STRONG
222#define GPIO_DRIVE_30 GPIO_DRIVE_STRONGEST
223
224#define HAVE_GPIO_STATE_T
225typedef enum {
233
234#define HAVE_GPIO_CONF_T
235typedef union gpio_conf_esp32 gpio_conf_t;
236
237#endif /* ndef DOXYGEN */
238
280
281/* END: GPIO LL overwrites */
283
344
348#define ADC_NUMOF_MAX (SOC_ADC_CHANNEL_NUM(0) + SOC_ADC_CHANNEL_NUM(1))
349
351
387
391#if defined(SOC_DAC_SUPPORTED) || DOXYGEN
392# define DAC_NUMOF_MAX (SOC_DAC_PERIPH_NUM)
393#endif
394
396
442
443#ifndef DOXYGEN
450#define HAVE_I2C_SPEED_T
451typedef enum {
452 I2C_SPEED_LOW = 0,
459#endif /* ndef DOXYGEN */
460
464typedef struct {
465 uint8_t module;
467 gpio_t scl;
468 gpio_t sda;
471} i2c_conf_t;
472
476#define I2C_NUMOF_MAX (SOC_I2C_NUM)
477
478#define PERIPH_I2C_NEED_READ_REG
479#define PERIPH_I2C_NEED_READ_REGS
480#define PERIPH_I2C_NEED_WRITE_REG
481#define PERIPH_I2C_NEED_WRITE_REGS
483
558
573typedef struct {
574 uint8_t module;
575 ledc_mode_t group;
576 ledc_timer_t timer;
577 uint8_t ch_numof;
578 const gpio_t *gpios;
580
584#define PWM_NUMOF_MAX (4)
585
589#define PWM_CH_NUMOF_MAX (SOC_LEDC_CHANNEL_NUM)
590
592
605
613typedef struct {
614 uint8_t channel;
617
623#define RMT_CH_NUMOF_MAX (SOC_RMT_CHANNELS_PER_GROUP)
624
626
631
635#define RNG_DATA_REG_ADDR (WDEV_RND_REG)
637
642
650#define RTT_FREQUENCY (32768UL)
651
655#define RTT_MAX_VALUE (0xFFFFFFFFUL)
656
660#define RTT_MIN_OFFSET (1U)
661
663
688typedef enum {
689#if IS_USED(SOC_SDMMC_USE_GPIO_MATRIX) || DOXYGEN
691#endif
694
706typedef struct {
710#if IS_USED(SOC_SDMMC_USE_GPIO_MATRIX) || DOXYGEN
717#if IS_USED(MODULE_PERIPH_SMMC_8BIT) || DOXYGEN
722#endif /* IS_USED(MODULE_PERIPH_SMMC_8BIT) */
723#else /* IS_USED(SOC_SDMMC_USE_IOMUX) */
724 uint8_t bus_width;
725#endif
727
731#define SDMMC_CPU_DMA_REQUIREMENTS __attribute__((aligned(SDMMC_CPU_DMA_ALIGNMENT)))
732
736#define SDMMC_CPU_DMA_ALIGNMENT 4
737
739
814
815#ifndef DOXYGEN
820#define HAVE_SPI_CLK_T
821typedef enum {
822 SPI_CLK_100KHZ = 100000,
823 SPI_CLK_400KHZ = 400000,
824 SPI_CLK_1MHZ = 1000000,
825 SPI_CLK_5MHZ = 5000000,
826 SPI_CLK_10MHZ = 10000000
827} spi_clk_t;
829
834#define spi_pin_mosi(dev) spi_config[dev].mosi
835#define spi_pin_miso(dev) spi_config[dev].miso
836#define spi_pin_clk(dev) spi_config[dev].sck
838
839#endif /* !DOXYGEN */
840
844typedef spi_host_device_t spi_ctrl_t;
845
846/*
847 * In former ESP-IDF versions, SPI interfaces were identified by the alias
848 * names `FSPI`, `HSPI` and `VSPI`, which are sometimes also used in data
849 * sheets. These alias names have been declared obsolete in ESP-IDF. For
850 * source code compatibility reasons these alias names are defined here.
851 */
852#if defined(CPU_FAM_ESP32)
853# define HSPI SPI2_HOST
854# define VSPI SPI3_HOST
855#elif defined(CPU_FAM_ESP32S2)
856# define FSPI SPI2_HOST
857# define HSPI SPI3_HOST
858#else
859# define FSPI SPI2_HOST
860#endif
861
865typedef struct {
867 gpio_t sck;
868 gpio_t mosi;
869 gpio_t miso;
870 gpio_t cs;
871} spi_conf_t;
872
876#define SPI_NUMOF_MAX (SOC_SPI_PERIPH_NUM - 1)
877
878#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
879#define PERIPH_SPI_NEEDS_TRANSFER_REG
880#define PERIPH_SPI_NEEDS_TRANSFER_REGS
882
907
908#ifndef MODULE_ESP_HW_COUNTER
915# define TIMER_NUMOF (SOC_TIMER_GROUP_TOTAL_TIMERS - 1)
916# define TIMER_CHANNEL_NUMOF (1)
917#endif
918
920#define TIMER_SYSTEM_GROUP 0 /* formerly TIMER_GROUP_0 */
922#define TIMER_SYSTEM_INDEX 0 /* formerly TIMER_0 */
924#define TIMER_SYSTEM_INT_SRC ETS_TG0_T0_LEVEL_INTR_SOURCE
925
927
931#define PERIPH_TIMER_PROVIDES_SET
932
974
978typedef struct {
979 gpio_t txd;
980 gpio_t rxd;
982
983#ifndef DOXYGEN
987typedef enum {
988 UART_STOP_BITS_1 = 0x1,
989 UART_STOP_BITS_1_5 = 0x2,
990 UART_STOP_BITS_2 = 0x3,
992
993#define HAVE_UART_STOP_BITS_T
994
998#define UART_MODE_UNSUPPORTED 0xf0
999
1003typedef enum {
1004 UART_PARITY_NONE = 0x0,
1005 UART_PARITY_EVEN = 0x2,
1006 UART_PARITY_ODD = 0x3,
1007 UART_PARITY_MARK = UART_MODE_UNSUPPORTED | 0,
1008 UART_PARITY_SPACE = UART_MODE_UNSUPPORTED | 1,
1010
1011#define UART_PARITY_DISABLE UART_PARITY_NONE
1012
1013#define HAVE_UART_PARITY_T
1014
1015#endif /* !DOXYGEN */
1016
1020#define UART_NUMOF_MAX (SOC_UART_NUM)
1022
1030#include "usbdev_synopsys_dwc2.h"
1031
1035#define USBDEV_NUMOF_MAX (SOC_USB_PERIPH_NUM)
1037
1038#ifdef __cplusplus
1039}
1040#endif
1041
1045#if defined(CPU_FAM_ESP32)
1046# include "periph_cpu_esp32.h"
1047#elif defined(CPU_FAM_ESP32C3)
1048# include "periph_cpu_esp32c3.h"
1049#elif defined(CPU_FAM_ESP32C6)
1050# include "periph_cpu_esp32c6.h"
1051#elif defined(CPU_FAM_ESP32H2)
1052# include "periph_cpu_esp32h2.h"
1053#elif defined(CPU_FAM_ESP32S2)
1054# include "periph_cpu_esp32s2.h"
1055#elif defined(CPU_FAM_ESP32S3)
1056# include "periph_cpu_esp32s3.h"
1057#else
1058# error "ESP32x family implementation missing"
1059#endif
1060
1061#ifdef MODULE_PERIPH_CAN
1062# include "can_esp.h"
1063#endif
gpio_flank_t
Definition periph_cpu.h:176
@ GPIO_OUT
select GPIO MASK as output
Definition periph_cpu.h:161
@ GPIO_IN
select GPIO MASK as input
Definition periph_cpu.h:160
i2c_speed_t
Definition periph_cpu.h:272
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:274
@ I2C_SPEED_FAST_PLUS
fast plus mode: ~1000 kbit/s
Definition periph_cpu.h:276
@ I2C_SPEED_LOW
low speed mode: ~10 kbit/s
Definition periph_cpu.h:273
@ I2C_SPEED_HIGH
high speed mode: ~3400 kbit/s
Definition periph_cpu.h:278
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition periph_cpu.h:275
spi_clk_t
Definition periph_cpu.h:348
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
Definition periph_cpu.h:353
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
Definition periph_cpu.h:352
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
Definition periph_cpu.h:350
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
Definition periph_cpu.h:351
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
Definition periph_cpu.h:349
SDK configuration used by ESP-IDF for all ESP32x SoC variants (families)
sdmmc_slot_t
SDIO/SDMMC slots.
Definition periph_cpu.h:688
@ SDMMC_SLOT_1
SD/MMC host controller slot 1.
Definition periph_cpu.h:692
@ SDMMC_SLOT_0
SD/MMC host controller slot 0 (not usable on ESP32 variant)
Definition periph_cpu.h:690
spi_ctrl_t
SPI controllers that can be used for peripheral interfaces.
Definition periph_cpu.h:267
gpio_mode_t
Available pin modes.
Definition periph_cpu.h:96
gpio_pull_t
Enumeration of pull resistor configurations.
Definition gpio_ll.h:254
gpio_pull_strength_t
Enumeration of pull resistor values.
Definition gpio_ll.h:272
gpio_state_t
Enumeration of GPIO states (direction)
Definition gpio_ll.h:162
gpio_slew_t
Enumeration of slew rate settings.
Definition gpio_ll.h:336
gpio_drive_strength_t
Enumeration of drive strength options.
Definition gpio_ll.h:303
typedef gpio_conf_t
GPIO pin configuration.
Definition gpio_ll.h:420
uintptr_t gpio_port_t
GPIO port type.
Definition gpio_ll.h:92
@ GPIO_PULL_WEAKEST
Use the weakest (highest Ohm value) resistor.
Definition gpio_ll.h:273
@ GPIO_PULL_WEAK
Use a weak pull resistor.
Definition gpio_ll.h:274
@ GPIO_PULL_STRONG
Use a strong pull resistor.
Definition gpio_ll.h:275
@ GPIO_PULL_STRONGEST
Use the strongest pull resistor.
Definition gpio_ll.h:276
@ GPIO_OUTPUT_OPEN_SOURCE
Use pin as output in open emitter configuration.
Definition gpio_ll.h:199
@ GPIO_USED_BY_PERIPHERAL
The GPIO pin is used by a peripheral.
Definition gpio_ll.h:218
@ GPIO_OUTPUT_OPEN_DRAIN
Use pin as output in open collector configuration.
Definition gpio_ll.h:186
@ GPIO_OUTPUT_PUSH_PULL
Use pin as output in push-pull configuration.
Definition gpio_ll.h:173
@ GPIO_DISCONNECT
Disconnect pin from all peripherals.
Definition gpio_ll.h:246
@ GPIO_INPUT
Use pin as input.
Definition gpio_ll.h:205
@ GPIO_SLEW_SLOWEST
let the output voltage level rise/fall as slow as possible
Definition gpio_ll.h:337
@ GPIO_SLEW_FAST
let the output voltage level rise/fall fast
Definition gpio_ll.h:340
@ GPIO_SLEW_SLOW
let the output voltage level rise/fall slowly
Definition gpio_ll.h:339
@ GPIO_SLEW_FASTEST
let the output voltage level rise/fall as fast as possible
Definition gpio_ll.h:341
@ GPIO_DRIVE_STRONG
Use a strong drive strength.
Definition gpio_ll.h:306
@ GPIO_DRIVE_WEAK
Use a weak drive strength.
Definition gpio_ll.h:305
@ GPIO_DRIVE_STRONGEST
Use the strongest drive strength.
Definition gpio_ll.h:307
@ GPIO_DRIVE_WEAKEST
Use the weakest drive strength.
Definition gpio_ll.h:304
unsigned int gpio_t
GPIO type identifier.
Definition periph_cpu.h:87
Common macros and compiler attributes/pragmas configuration.
ESP32 specific peripheral configuration.
ESP32-C3 specific peripheral configuration.
ESP32-C6 specific peripheral configuration.
ESP32-H2 specific peripheral configuration.
ESP32-S2 specific peripheral configuration.
ESP32-S3 specific peripheral configuration.
uart_parity_t
Definition of possible parity modes.
Definition periph_cpu.h:498
@ UART_PARITY_SPACE
space parity
Definition periph_cpu.h:503
@ UART_PARITY_NONE
no parity
Definition periph_cpu.h:499
@ UART_PARITY_EVEN
even parity
Definition periph_cpu.h:500
@ UART_PARITY_ODD
odd parity
Definition periph_cpu.h:501
@ UART_PARITY_MARK
mark parity
Definition periph_cpu.h:502
uart_stop_bits_t
Definition of possible stop bits lengths.
Definition periph_cpu.h:530
@ UART_STOP_BITS_2
2 stop bits
Definition periph_cpu.h:532
@ UART_STOP_BITS_1
1 stop bit
Definition periph_cpu.h:531
I2C configuration structure.
Definition periph_cpu.h:295
bool scl_pullup
Pullup enabled for SCL pin.
Definition periph_cpu.h:469
i2c_speed_t speed
Configured bus speed, actual speed may be lower but never higher.
Definition periph_cpu.h:300
bool sda_pullup
Pullup enabled for SDA pin.
Definition periph_cpu.h:470
gpio_t sda
GPIO used as SDA pin.
Definition periph_cpu.h:468
gpio_t scl
GPIO used as SCL pin.
Definition periph_cpu.h:467
uint8_t module
I2C module identifier.
Definition periph_cpu.h:465
PWM configuration structure type.
Definition periph_cpu.h:573
ledc_mode_t group
LEDC channel group used (low/high speed)
Definition periph_cpu.h:575
ledc_timer_t timer
LEDC timer used by this device.
Definition periph_cpu.h:576
uint8_t module
LEDC module identifier.
Definition periph_cpu.h:574
uint8_t ch_numof
Number of channels used by this device.
Definition periph_cpu.h:577
const gpio_t * gpios
GPIOs used as channels of this device.
Definition periph_cpu.h:578
RMT channel configuration.
Definition periph_cpu.h:613
uint8_t channel
channel index
Definition periph_cpu.h:614
gpio_t gpio
GPIO used as RMT channel.
Definition periph_cpu.h:615
SDMMC slot configuration.
Definition periph_cpu.h:706
gpio_t wp
Write Protect pin (must be GPIO_UNDEF if not connected)
Definition periph_cpu.h:709
gpio_t dat1
DAT[1] pin (GPIO_UNDEF if not connected)
Definition periph_cpu.h:714
gpio_t dat3
DAT[3] pin (GPIO_UNDEF if not connected)
Definition periph_cpu.h:716
gpio_t clk
CLK pin (must be defined)
Definition periph_cpu.h:711
gpio_t dat0
DAT[0] pin (must be defined)
Definition periph_cpu.h:713
gpio_t dat4
DAT[4] pin (GPIO_UNDEF if not connected)
Definition periph_cpu.h:718
gpio_t cmd
CMD pin (must be defined)
Definition periph_cpu.h:712
gpio_t dat6
DAT[6] pin (GPIO_UNDEF if not connected)
Definition periph_cpu.h:720
gpio_t dat7
DAT[7] pin (GPIO_UNDEF if not connected)
Definition periph_cpu.h:721
gpio_t dat2
DAT[2] pin (GPIO_UNDEF if not connected)
Definition periph_cpu.h:715
gpio_t dat5
DAT[5] pin (GPIO_UNDEF if not connected)
Definition periph_cpu.h:719
sdmmc_slot_t slot
SDMMC slot used [ SDMMC_SLOT_0 | SDMMC_SLOT_1].
Definition periph_cpu.h:707
gpio_t cd
Card Detect pin (must be GPIO_UNDEF if not connected)
Definition periph_cpu.h:708
SPI device configuration.
Definition periph_cpu.h:333
gpio_t mosi
GPIO used as MOSI pin.
Definition periph_cpu.h:868
spi_ctrl_t ctrl
SPI controller used for the interface.
Definition periph_cpu.h:866
gpio_t cs
GPIO used as CS0 pin.
Definition periph_cpu.h:870
gpio_t miso
GPIO used as MISO pin.
Definition periph_cpu.h:869
gpio_t sck
GPIO used as SCK pin.
Definition periph_cpu.h:867
UART device configuration.
Definition periph_cpu.h:214
gpio_t txd
GPIO used as TxD pin.
Definition periph_cpu.h:979
gpio_t rxd
GPIO used as RxD pin.
Definition periph_cpu.h:980
GPIO pin configuration for ESP32/ESP32Cx/ESP32Sx MCUs.
Definition periph_cpu.h:243
bool initial_value
Initial value of the output.
Definition periph_cpu.h:277
gpio_state_t state
State of the pin.
Definition periph_cpu.h:249
gpio_drive_strength_t drive_strength
Drive strength of the GPIO.
Definition periph_cpu.h:263
gpio_pull_t pull
Pull resistor configuration.
Definition periph_cpu.h:253
uint8_t bits
the raw bits
Definition periph_cpu.h:244
Low level USB FS/HS driver definitions for MCUs with Synopsys DWC2 IP core.