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periph_cpu.h
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1/*
2 * Copyright (C) 2022 Gunar Schorcht
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
9#pragma once
10
20
21#include <stdbool.h>
22#include <stdint.h>
23#include "sdkconfig.h"
24#include "hal/ledc_types.h"
25#include "hal/spi_types.h"
26#include "soc/ledc_struct.h"
27#include "soc/periph_defs.h"
28#include "soc/soc_caps.h"
29
30#include "modules.h"
31
32#ifdef __cplusplus
33extern "C" {
34#endif
35
39#define STDIO_UART_DEV CONFIG_ESP_CONSOLE_UART_NUM
40
45#define PROVIDES_PM_SET_LOWEST
46#define PROVIDES_PM_RESTART
47#define PROVIDES_PM_OFF
48#define PROVIDES_PM_LAYERED_OFF
49
53#define PM_NUM_MODES (3U)
54
59#define ESP_PM_MODEM_SLEEP (2U)
60#define ESP_PM_LIGHT_SLEEP (1U)
61#define ESP_PM_DEEP_SLEEP (0U)
63
65
69#if defined(CPU_FAM_ESP32H2) && defined(CONFIG_IEEE802154_ENABLED)
70/* ESP32H2 has IEEE802.15.4 radio which has an EUI64 address. Function
71 * esp_efuse_mac_get_default will return this 8 byte address if
72 * CONFIG_IEEE802154_ENABLED */
73# define CPUID_LEN (8U)
74#else
75# define CPUID_LEN (6U)
76#endif
77
82
89#define HAVE_GPIO_T
90typedef unsigned int gpio_t;
92
97#define GPIO_UNDEF (0xffffffff)
99
104#define GPIO_PIN(x, y) ((x << 5) | y)
106
111#define PORT_GPIO (0)
113
118#define GPIO_PIN_NUMOF (SOC_GPIO_PIN_COUNT)
120
121#ifndef DOXYGEN
127#define HAVE_GPIO_FLANK_T
128typedef enum {
129 GPIO_NONE,
130 GPIO_RISING,
131 GPIO_FALLING,
132 GPIO_BOTH,
133 GPIO_LOW,
134 GPIO_HIGH
137
143#define HAVE_GPIO_MODE_T
144typedef enum {
145 GPIO_IN,
146 GPIO_IN_PD,
147 GPIO_IN_PU,
148 GPIO_OUT,
149 GPIO_OD,
150 GPIO_OD_PU,
151 GPIO_IN_OUT,
152 GPIO_IN_OD,
153 GPIO_IN_OD_PU
156
157/* BEGIN: GPIO LL overwrites */
158
159#if SOC_GPIO_PIN_COUNT > 32
160# define GPIO_PORT_NUMOF 2
161# define GPIO_PORT_0 0
162# define GPIO_PORT_1 1
163# define GPIO_PORT_0_PIN_NUMOF (32)
164# define GPIO_PORT_1_PIN_NUMOF (SOC_GPIO_PIN_COUNT - 32)
165# define GPIO_PORT_PIN_NUMOF(p) ((p == GPIO_PORT_0) ? GPIO_PORT_0_PIN_NUMOF \
166 : GPIO_PORT_1_PIN_NUMOF)
167#else
168# define GPIO_PORT_NUMOF 1
169# define GPIO_PORT_0 0
170# define GPIO_PORT_0_PIN_NUMOF (SOC_GPIO_PIN_COUNT)
171# define GPIO_PORT_PIN_NUMOF(p) ((p == GPIO_PORT_0) ? GPIO_PORT_0_PIN_NUMOF : 0)
172#endif
173
174#define HAVE_GPIO_PORT_T
175typedef uintptr_t gpio_port_t;
176
177#define HAVE_GPIO_SLEW_T
178typedef enum {
180 GPIO_SLEW_SLOW = 0,
181 GPIO_SLEW_FAST = 0,
184
185#define HAVE_GPIO_PULL_STRENGTH_T
186typedef enum {
188 GPIO_PULL_WEAK = 0,
192
193/*
194 * This include is placed here by intention to avoid type name conflicts.
195 * Having the macros HAVE_GPIO_* defined before including this file allows to
196 * use these macros in `hal/gpio_types.h` to decide whether to use the
197 * ESP-IDF types when compiling ESP-IDF modules or to use the RIOT types
198 * when compiling RIOT source code.
199 */
200#include "hal/gpio_types.h"
201
202#define HAVE_GPIO_PULL_T
203typedef gpio_pull_mode_t gpio_pull_t;
204#define GPIO_PULL_UP GPIO_PULLUP_ONLY
205#define GPIO_PULL_DOWN GPIO_PULLDOWN_ONLY
206#define GPIO_PULL_KEEP GPIO_PULLUP_PULLDOWN
207
211#define HAVE_GPIO_DRIVE_STRENGTH_T
212typedef enum {
214 GPIO_DRIVE_WEAK = 1,
218
219/*
220 * @brief Map former enumeration values the new enumeration values for compatibility.
221 */
222#define GPIO_DRIVE_5 GPIO_DRIVE_WEAKEST
223#define GPIO_DRIVE_10 GPIO_DRIVE_WEAK
224#define GPIO_DRIVE_20 GPIO_DRIVE_STRONG
225#define GPIO_DRIVE_30 GPIO_DRIVE_STRONGEST
226
227#define HAVE_GPIO_STATE_T
228typedef enum {
236
237#define HAVE_GPIO_CONF_T
238typedef union gpio_conf_esp32 gpio_conf_t;
239
240#endif /* ndef DOXYGEN */
241
283
284/* END: GPIO LL overwrites */
286
347
351#define ADC_NUMOF_MAX (SOC_ADC_CHANNEL_NUM(0) + SOC_ADC_CHANNEL_NUM(1))
352
354
390
394#if defined(SOC_DAC_SUPPORTED) || DOXYGEN
395# define DAC_NUMOF_MAX (SOC_DAC_PERIPH_NUM)
396#endif
397
399
445
446#ifndef DOXYGEN
453#define HAVE_I2C_SPEED_T
454typedef enum {
455 I2C_SPEED_LOW = 0,
462#endif /* ndef DOXYGEN */
463
467typedef struct {
468 uint8_t module;
470 gpio_t scl;
471 gpio_t sda;
474} i2c_conf_t;
475
479#define I2C_NUMOF_MAX (SOC_I2C_NUM)
480
481#define PERIPH_I2C_NEED_READ_REG
482#define PERIPH_I2C_NEED_READ_REGS
483#define PERIPH_I2C_NEED_WRITE_REG
484#define PERIPH_I2C_NEED_WRITE_REGS
486
561
576typedef struct {
577 uint8_t module;
578 ledc_mode_t group;
579 ledc_timer_t timer;
580 uint8_t ch_numof;
581 const gpio_t *gpios;
583
587#define PWM_NUMOF_MAX (4)
588
592#define PWM_CH_NUMOF_MAX (SOC_LEDC_CHANNEL_NUM)
593
595
608
616typedef struct {
617 uint8_t channel;
620
626#define RMT_CH_NUMOF_MAX (SOC_RMT_CHANNELS_PER_GROUP)
627
629
634
638#define RNG_DATA_REG_ADDR (WDEV_RND_REG)
640
645
653#define RTT_FREQUENCY (32768UL)
654
658#define RTT_MAX_VALUE (0xFFFFFFFFUL)
659
661
686typedef enum {
687#if IS_USED(SOC_SDMMC_USE_GPIO_MATRIX) || DOXYGEN
689#endif
692
704typedef struct {
708#if IS_USED(SOC_SDMMC_USE_GPIO_MATRIX) || DOXYGEN
715#if IS_USED(MODULE_PERIPH_SMMC_8BIT) || DOXYGEN
720#endif /* IS_USED(MODULE_PERIPH_SMMC_8BIT) */
721#else /* IS_USED(SOC_SDMMC_USE_IOMUX) */
722 uint8_t bus_width;
723#endif
725
729#define SDMMC_CPU_DMA_REQUIREMENTS __attribute__((aligned(SDMMC_CPU_DMA_ALIGNMENT)))
730
734#define SDMMC_CPU_DMA_ALIGNMENT 4
735
737
812
813#ifndef DOXYGEN
818#define HAVE_SPI_CLK_T
819typedef enum {
820 SPI_CLK_100KHZ = 100000,
821 SPI_CLK_400KHZ = 400000,
822 SPI_CLK_1MHZ = 1000000,
823 SPI_CLK_5MHZ = 5000000,
824 SPI_CLK_10MHZ = 10000000
825} spi_clk_t;
827
832#define spi_pin_mosi(dev) spi_config[dev].mosi
833#define spi_pin_miso(dev) spi_config[dev].miso
834#define spi_pin_clk(dev) spi_config[dev].sck
836
837#endif /* !DOXYGEN */
838
842typedef spi_host_device_t spi_ctrl_t;
843
844/*
845 * In former ESP-IDF versions, SPI interfaces were identified by the alias
846 * names `FSPI`, `HSPI` and `VSPI`, which are sometimes also used in data
847 * sheets. These alias names have been declared obsolete in ESP-IDF. For
848 * source code compatibility reasons these alias names are defined here.
849 */
850#if defined(CPU_FAM_ESP32)
851# define HSPI SPI2_HOST
852# define VSPI SPI3_HOST
853#elif defined(CPU_FAM_ESP32S2)
854# define FSPI SPI2_HOST
855# define HSPI SPI3_HOST
856#else
857# define FSPI SPI2_HOST
858#endif
859
863typedef struct {
865 gpio_t sck;
866 gpio_t mosi;
867 gpio_t miso;
868 gpio_t cs;
869} spi_conf_t;
870
874#define SPI_NUMOF_MAX (SOC_SPI_PERIPH_NUM - 1)
875
876#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
877#define PERIPH_SPI_NEEDS_TRANSFER_REG
878#define PERIPH_SPI_NEEDS_TRANSFER_REGS
880
905
906#ifndef MODULE_ESP_HW_COUNTER
913# define TIMER_NUMOF (SOC_TIMER_GROUP_TOTAL_TIMERS - 1)
914# define TIMER_CHANNEL_NUMOF (1)
915#endif
916
918#define TIMER_SYSTEM_GROUP 0 /* formerly TIMER_GROUP_0 */
920#define TIMER_SYSTEM_INDEX 0 /* formerly TIMER_0 */
922#define TIMER_SYSTEM_INT_SRC ETS_TG0_T0_LEVEL_INTR_SOURCE
923
925
929#define PERIPH_TIMER_PROVIDES_SET
930
972
976typedef struct {
977 gpio_t txd;
978 gpio_t rxd;
980
981#ifndef DOXYGEN
985typedef enum {
986 UART_STOP_BITS_1 = 0x1,
987 UART_STOP_BITS_1_5 = 0x2,
988 UART_STOP_BITS_2 = 0x3,
990
991#define HAVE_UART_STOP_BITS_T
992
996#define UART_MODE_UNSUPPORTED 0xf0
997
1001typedef enum {
1002 UART_PARITY_NONE = 0x0,
1003 UART_PARITY_EVEN = 0x2,
1004 UART_PARITY_ODD = 0x3,
1005 UART_PARITY_MARK = UART_MODE_UNSUPPORTED | 0,
1006 UART_PARITY_SPACE = UART_MODE_UNSUPPORTED | 1,
1008
1009#define UART_PARITY_DISABLE UART_PARITY_NONE
1010
1011#define HAVE_UART_PARITY_T
1012
1013#endif /* !DOXYGEN */
1014
1018#define UART_NUMOF_MAX (SOC_UART_NUM)
1020
1028#include "usbdev_synopsys_dwc2.h"
1029
1033#define USBDEV_NUMOF_MAX (SOC_USB_PERIPH_NUM)
1035
1036#ifdef __cplusplus
1037}
1038#endif
1039
1043#if defined(CPU_FAM_ESP32)
1044# include "periph_cpu_esp32.h"
1045#elif defined(CPU_FAM_ESP32C3)
1046# include "periph_cpu_esp32c3.h"
1047#elif defined(CPU_FAM_ESP32C6)
1048# include "periph_cpu_esp32c6.h"
1049#elif defined(CPU_FAM_ESP32H2)
1050# include "periph_cpu_esp32h2.h"
1051#elif defined(CPU_FAM_ESP32S2)
1052# include "periph_cpu_esp32s2.h"
1053#elif defined(CPU_FAM_ESP32S3)
1054# include "periph_cpu_esp32s3.h"
1055#else
1056# error "ESP32x family implementation missing"
1057#endif
1058
1059#ifdef MODULE_PERIPH_CAN
1060# include "can_esp.h"
1061#endif
gpio_flank_t
Definition periph_cpu.h:179
@ GPIO_OUT
select GPIO MASK as output
Definition periph_cpu.h:164
@ GPIO_IN
select GPIO MASK as input
Definition periph_cpu.h:163
i2c_speed_t
Definition periph_cpu.h:275
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:277
@ I2C_SPEED_FAST_PLUS
fast plus mode: ~1000 kbit/s
Definition periph_cpu.h:279
@ I2C_SPEED_LOW
low speed mode: ~10 kbit/s
Definition periph_cpu.h:276
@ I2C_SPEED_HIGH
high speed mode: ~3400 kbit/s
Definition periph_cpu.h:281
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition periph_cpu.h:278
spi_clk_t
Definition periph_cpu.h:351
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
Definition periph_cpu.h:356
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
Definition periph_cpu.h:355
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
Definition periph_cpu.h:353
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
Definition periph_cpu.h:354
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
Definition periph_cpu.h:352
SDK configuration used by ESP-IDF for all ESP32x SoC variants (families)
sdmmc_slot_t
SDIO/SDMMC slots.
Definition periph_cpu.h:686
@ SDMMC_SLOT_1
SD/MMC host controller slot 1.
Definition periph_cpu.h:690
@ SDMMC_SLOT_0
SD/MMC host controller slot 0 (not usable on ESP32 variant)
Definition periph_cpu.h:688
spi_ctrl_t
SPI controllers that can be used for peripheral interfaces.
Definition periph_cpu.h:264
gpio_mode_t
Available pin modes.
Definition periph_cpu.h:91
gpio_pull_t
Enumeration of pull resistor configurations.
Definition gpio_ll.h:257
gpio_pull_strength_t
Enumeration of pull resistor values.
Definition gpio_ll.h:275
gpio_state_t
Enumeration of GPIO states (direction)
Definition gpio_ll.h:165
gpio_slew_t
Enumeration of slew rate settings.
Definition gpio_ll.h:339
gpio_drive_strength_t
Enumeration of drive strength options.
Definition gpio_ll.h:306
typedef gpio_conf_t
GPIO pin configuration.
Definition gpio_ll.h:423
uintptr_t gpio_port_t
GPIO port type.
Definition gpio_ll.h:95
@ GPIO_PULL_WEAKEST
Use the weakest (highest Ohm value) resistor.
Definition gpio_ll.h:276
@ GPIO_PULL_WEAK
Use a weak pull resistor.
Definition gpio_ll.h:277
@ GPIO_PULL_STRONG
Use a strong pull resistor.
Definition gpio_ll.h:278
@ GPIO_PULL_STRONGEST
Use the strongest pull resistor.
Definition gpio_ll.h:279
@ GPIO_OUTPUT_OPEN_SOURCE
Use pin as output in open emitter configuration.
Definition gpio_ll.h:202
@ GPIO_USED_BY_PERIPHERAL
The GPIO pin is used by a peripheral.
Definition gpio_ll.h:221
@ GPIO_OUTPUT_OPEN_DRAIN
Use pin as output in open collector configuration.
Definition gpio_ll.h:189
@ GPIO_OUTPUT_PUSH_PULL
Use pin as output in push-pull configuration.
Definition gpio_ll.h:176
@ GPIO_DISCONNECT
Disconnect pin from all peripherals.
Definition gpio_ll.h:249
@ GPIO_INPUT
Use pin as input.
Definition gpio_ll.h:208
@ GPIO_SLEW_SLOWEST
let the output voltage level rise/fall as slow as possible
Definition gpio_ll.h:340
@ GPIO_SLEW_FAST
let the output voltage level rise/fall fast
Definition gpio_ll.h:343
@ GPIO_SLEW_SLOW
let the output voltage level rise/fall slowly
Definition gpio_ll.h:342
@ GPIO_SLEW_FASTEST
let the output voltage level rise/fall as fast as possible
Definition gpio_ll.h:344
@ GPIO_DRIVE_STRONG
Use a strong drive strength.
Definition gpio_ll.h:309
@ GPIO_DRIVE_WEAK
Use a weak drive strength.
Definition gpio_ll.h:308
@ GPIO_DRIVE_STRONGEST
Use the strongest drive strength.
Definition gpio_ll.h:310
@ GPIO_DRIVE_WEAKEST
Use the weakest drive strength.
Definition gpio_ll.h:307
unsigned int gpio_t
GPIO type identifier.
Definition periph_cpu.h:90
Common macros and compiler attributes/pragmas configuration.
ESP32 specific peripheral configuration.
ESP32-C3 specific peripheral configuration.
ESP32-C6 specific peripheral configuration.
ESP32-H2 specific peripheral configuration.
ESP32-S2 specific peripheral configuration.
ESP32-S3 specific peripheral configuration.
uart_parity_t
Definition of possible parity modes.
Definition periph_cpu.h:501
@ UART_PARITY_SPACE
space parity
Definition periph_cpu.h:506
@ UART_PARITY_NONE
no parity
Definition periph_cpu.h:502
@ UART_PARITY_EVEN
even parity
Definition periph_cpu.h:503
@ UART_PARITY_ODD
odd parity
Definition periph_cpu.h:504
@ UART_PARITY_MARK
mark parity
Definition periph_cpu.h:505
uart_stop_bits_t
Definition of possible stop bits lengths.
Definition periph_cpu.h:533
@ UART_STOP_BITS_2
2 stop bits
Definition periph_cpu.h:535
@ UART_STOP_BITS_1
1 stop bit
Definition periph_cpu.h:534
I2C configuration structure.
Definition periph_cpu.h:298
bool scl_pullup
Pullup enabled for SCL pin.
Definition periph_cpu.h:472
i2c_speed_t speed
Configured bus speed, actual speed may be lower but never higher.
Definition periph_cpu.h:303
bool sda_pullup
Pullup enabled for SDA pin.
Definition periph_cpu.h:473
gpio_t sda
GPIO used as SDA pin.
Definition periph_cpu.h:471
gpio_t scl
GPIO used as SCL pin.
Definition periph_cpu.h:470
uint8_t module
I2C module identifier.
Definition periph_cpu.h:468
PWM configuration structure type.
Definition periph_cpu.h:576
ledc_mode_t group
LEDC channel group used (low/high speed)
Definition periph_cpu.h:578
ledc_timer_t timer
LEDC timer used by this device.
Definition periph_cpu.h:579
uint8_t module
LEDC module identifier.
Definition periph_cpu.h:577
uint8_t ch_numof
Number of channels used by this device.
Definition periph_cpu.h:580
const gpio_t * gpios
GPIOs used as channels of this device.
Definition periph_cpu.h:581
RMT channel configuration.
Definition periph_cpu.h:616
uint8_t channel
channel index
Definition periph_cpu.h:617
gpio_t gpio
GPIO used as RMT channel.
Definition periph_cpu.h:618
SDMMC slot configuration.
Definition periph_cpu.h:704
gpio_t wp
Write Protect pin (must be GPIO_UNDEF if not connected)
Definition periph_cpu.h:707
gpio_t dat1
DAT[1] pin (GPIO_UNDEF if not connected)
Definition periph_cpu.h:712
gpio_t dat3
DAT[3] pin (GPIO_UNDEF if not connected)
Definition periph_cpu.h:714
gpio_t clk
CLK pin (must be defined)
Definition periph_cpu.h:709
gpio_t dat0
DAT[0] pin (must be defined)
Definition periph_cpu.h:711
gpio_t dat4
DAT[4] pin (GPIO_UNDEF if not connected)
Definition periph_cpu.h:716
gpio_t cmd
CMD pin (must be defined)
Definition periph_cpu.h:710
gpio_t dat6
DAT[6] pin (GPIO_UNDEF if not connected)
Definition periph_cpu.h:718
gpio_t dat7
DAT[7] pin (GPIO_UNDEF if not connected)
Definition periph_cpu.h:719
gpio_t dat2
DAT[2] pin (GPIO_UNDEF if not connected)
Definition periph_cpu.h:713
gpio_t dat5
DAT[5] pin (GPIO_UNDEF if not connected)
Definition periph_cpu.h:717
sdmmc_slot_t slot
SDMMC slot used [ SDMMC_SLOT_0 | SDMMC_SLOT_1].
Definition periph_cpu.h:705
gpio_t cd
Card Detect pin (must be GPIO_UNDEF if not connected)
Definition periph_cpu.h:706
SPI device configuration.
Definition periph_cpu.h:336
gpio_t mosi
GPIO used as MOSI pin.
Definition periph_cpu.h:866
spi_ctrl_t ctrl
SPI controller used for the interface.
Definition periph_cpu.h:864
gpio_t cs
GPIO used as CS0 pin.
Definition periph_cpu.h:868
gpio_t miso
GPIO used as MISO pin.
Definition periph_cpu.h:867
gpio_t sck
GPIO used as SCK pin.
Definition periph_cpu.h:865
UART device configuration.
Definition periph_cpu.h:217
gpio_t txd
GPIO used as TxD pin.
Definition periph_cpu.h:977
gpio_t rxd
GPIO used as RxD pin.
Definition periph_cpu.h:978
GPIO pin configuration for ESP32/ESP32Cx/ESP32Sx MCUs.
Definition periph_cpu.h:246
bool initial_value
Initial value of the output.
Definition periph_cpu.h:280
gpio_state_t state
State of the pin.
Definition periph_cpu.h:252
gpio_drive_strength_t drive_strength
Drive strength of the GPIO.
Definition periph_cpu.h:266
gpio_pull_t pull
Pull resistor configuration.
Definition periph_cpu.h:256
uint8_t bits
the raw bits
Definition periph_cpu.h:247
Low level USB FS/HS driver definitions for MCUs with Synopsys DWC2 IP core.