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cfg_usbdev_default.h
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1/*
2 * Copyright (C) 2023 Gunar Schorcht <gunar@schorcht.net>
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
19#ifndef CFG_USBDEV_DEFAULT_H
20#define CFG_USBDEV_DEFAULT_H
21
22#include "vendor/usbdev_gd32v.h"
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
36#define DWC2_USB_OTG_FS_ENABLED
37
42 {
43 .periph = USB_OTG_FS_PERIPH_BASE,
44 .type = DWC2_USB_OTG_FS,
46 .rcu_mask = RCU_AHBEN_USBFSEN_Msk,
47 .irqn = USBFS_IRQn,
48 .bus = AHB,
49 }
50};
51
55#define USBDEV_NUMOF ARRAY_SIZE(dwc2_usb_otg_fshs_config)
58#ifdef __cplusplus
59}
60#endif
61
62#endif /* CFG_USBDEV_DEFAULT_H */
static const dwc2_usb_otg_fshs_config_t dwc2_usb_otg_fshs_config[]
Common USB OTG FS configuration.
@ AHB
Advanced High-performance Bus.
Definition periph_cpu.h:78
uintptr_t periph
USB peripheral base address.
Low level USB FS/HS driver definitions for MCUs with Synopsys DWC2 IP core.
@ DWC2_USB_OTG_PHY_BUILTIN
on-chip FS PHY
@ DWC2_USB_OTG_FS
Full speed peripheral.