Register definitions for InvenSense ITG320X 3-axis gyroscope. More...
Register definitions for InvenSense ITG320X 3-axis gyroscope.
Definition in file itg320x_regs.h.
Go to the source code of this file.
Register addresses | |
#define | ITG320X_REG_WHO_AM_I (0x00) |
#define | ITG320X_REG_SMPLRT_DIV (0x15) |
#define | ITG320X_REG_DLPFS (0x16) |
#define | ITG320X_REG_INT_CFG (0x17) |
#define | ITG320X_REG_INT_STATUS (0x1a) |
#define | ITG320X_REG_TEMP_OUT_H (0x1b) |
#define | ITG320X_REG_TEMP_OUT_L (0x1c) |
#define | ITG320X_REG_GYRO_XOUT_H (0x1d) |
#define | ITG320X_REG_GYRO_XOUT_L (0x1e) |
#define | ITG320X_REG_GYRO_YOUT_H (0x1f) |
#define | ITG320X_REG_GYRO_YOUT_L (0x20) |
#define | ITG320X_REG_GYRO_ZOUT_H (0x21) |
#define | ITG320X_REG_GYRO_ZOUT_L (0x22) |
#define | ITG320X_REG_PWR_MGM (0x3e) |
Register structure definitions | |
#define | ITG320X_REG_DLPFS_FS_SEL (0x18) |
ITG320X_REG_DLPFS<4:3> | |
#define | ITG320X_REG_DLPFS_FS_SEL_VAL (0x18) |
ITG320X_REG_DLPFS<4:3> = 3. | |
#define | ITG320X_REG_DLPFS_DLPF_CFG (0x07) |
ITG320X_REG_DLPFS<2:0> | |
#define | ITG320X_REG_INT_CFG_ACTL (0x80) |
ITG320X_REG_INT_CFG<7> | |
#define | ITG320X_REG_INT_CFG_OPEN (0x40) |
ITG320X_REG_INT_CFG<6> | |
#define | ITG320X_REG_INT_CFG_LATCH_INT (0x20) |
ITG320X_REG_INT_CFG<5> | |
#define | ITG320X_REG_INT_CFG_ANY_RDY_CLR (0x10) |
ITG320X_REG_INT_CFG<4> | |
#define | ITG320X_REG_INT_CFG_ITG_RDY_EN (0x04) |
ITG320X_REG_INT_CFG<2> | |
#define | ITG320X_REG_INT_CFG_RAW_RDY_EN (0x01) |
ITG320X_REG_INT_CFG<0> | |
#define | ITG320X_REG_INT_STATUS_ITG_RDY (0x04) |
ITG320X_REG_INT_STATUS<2> | |
#define | ITG320X_REG_INT_STATUS_RAW_RDY (0x01) |
ITG320X_REG_INT_STATUS<0> | |
#define | ITG320X_REG_PWR_MGM_H_RESET (0x80) |
ITG320X_REG_PWR_MGM<7> | |
#define | ITG320X_REG_PWR_MGM_SLEEP (0x40) |
ITG320X_REG_PWR_MGM<6> | |
#define | ITG320X_REG_PWR_MGM_STBY_XG (0x20) |
ITG320X_REG_PWR_MGM<5> | |
#define | ITG320X_REG_PWR_MGM_STBY_YG (0x10) |
ITG320X_REG_PWR_MGM<4> | |
#define | ITG320X_REG_PWR_MGM_STBY_ZG (0x08) |
ITG320X_REG_PWR_MGM<3> | |
#define | ITG320X_REG_PWR_MGM_CLK_SEL (0x07) |
ITG320X_REG_PWR_MGM<2:0> | |
#define ITG320X_REG_DLPFS (0x16) |
Definition at line 31 of file itg320x_regs.h.
#define ITG320X_REG_DLPFS_DLPF_CFG (0x07) |
ITG320X_REG_DLPFS<2:0>
Definition at line 51 of file itg320x_regs.h.
#define ITG320X_REG_DLPFS_FS_SEL (0x18) |
ITG320X_REG_DLPFS<4:3>
Definition at line 49 of file itg320x_regs.h.
#define ITG320X_REG_DLPFS_FS_SEL_VAL (0x18) |
ITG320X_REG_DLPFS<4:3> = 3.
Definition at line 50 of file itg320x_regs.h.
#define ITG320X_REG_GYRO_XOUT_H (0x1d) |
Definition at line 36 of file itg320x_regs.h.
#define ITG320X_REG_GYRO_XOUT_L (0x1e) |
Definition at line 37 of file itg320x_regs.h.
#define ITG320X_REG_GYRO_YOUT_H (0x1f) |
Definition at line 38 of file itg320x_regs.h.
#define ITG320X_REG_GYRO_YOUT_L (0x20) |
Definition at line 39 of file itg320x_regs.h.
#define ITG320X_REG_GYRO_ZOUT_H (0x21) |
Definition at line 40 of file itg320x_regs.h.
#define ITG320X_REG_GYRO_ZOUT_L (0x22) |
Definition at line 41 of file itg320x_regs.h.
#define ITG320X_REG_INT_CFG (0x17) |
Definition at line 32 of file itg320x_regs.h.
#define ITG320X_REG_INT_CFG_ACTL (0x80) |
ITG320X_REG_INT_CFG<7>
Definition at line 53 of file itg320x_regs.h.
#define ITG320X_REG_INT_CFG_ANY_RDY_CLR (0x10) |
ITG320X_REG_INT_CFG<4>
Definition at line 56 of file itg320x_regs.h.
#define ITG320X_REG_INT_CFG_ITG_RDY_EN (0x04) |
ITG320X_REG_INT_CFG<2>
Definition at line 57 of file itg320x_regs.h.
#define ITG320X_REG_INT_CFG_LATCH_INT (0x20) |
ITG320X_REG_INT_CFG<5>
Definition at line 55 of file itg320x_regs.h.
#define ITG320X_REG_INT_CFG_OPEN (0x40) |
ITG320X_REG_INT_CFG<6>
Definition at line 54 of file itg320x_regs.h.
#define ITG320X_REG_INT_CFG_RAW_RDY_EN (0x01) |
ITG320X_REG_INT_CFG<0>
Definition at line 58 of file itg320x_regs.h.
#define ITG320X_REG_INT_STATUS (0x1a) |
Definition at line 33 of file itg320x_regs.h.
#define ITG320X_REG_INT_STATUS_ITG_RDY (0x04) |
ITG320X_REG_INT_STATUS<2>
Definition at line 60 of file itg320x_regs.h.
#define ITG320X_REG_INT_STATUS_RAW_RDY (0x01) |
ITG320X_REG_INT_STATUS<0>
Definition at line 61 of file itg320x_regs.h.
#define ITG320X_REG_PWR_MGM (0x3e) |
Definition at line 42 of file itg320x_regs.h.
#define ITG320X_REG_PWR_MGM_CLK_SEL (0x07) |
ITG320X_REG_PWR_MGM<2:0>
Definition at line 68 of file itg320x_regs.h.
#define ITG320X_REG_PWR_MGM_H_RESET (0x80) |
ITG320X_REG_PWR_MGM<7>
Definition at line 63 of file itg320x_regs.h.
#define ITG320X_REG_PWR_MGM_SLEEP (0x40) |
ITG320X_REG_PWR_MGM<6>
Definition at line 64 of file itg320x_regs.h.
#define ITG320X_REG_PWR_MGM_STBY_XG (0x20) |
ITG320X_REG_PWR_MGM<5>
Definition at line 65 of file itg320x_regs.h.
#define ITG320X_REG_PWR_MGM_STBY_YG (0x10) |
ITG320X_REG_PWR_MGM<4>
Definition at line 66 of file itg320x_regs.h.
#define ITG320X_REG_PWR_MGM_STBY_ZG (0x08) |
ITG320X_REG_PWR_MGM<3>
Definition at line 67 of file itg320x_regs.h.
#define ITG320X_REG_SMPLRT_DIV (0x15) |
Definition at line 30 of file itg320x_regs.h.
#define ITG320X_REG_TEMP_OUT_H (0x1b) |
Definition at line 34 of file itg320x_regs.h.
#define ITG320X_REG_TEMP_OUT_L (0x1c) |
Definition at line 35 of file itg320x_regs.h.
#define ITG320X_REG_WHO_AM_I (0x00) |
Definition at line 29 of file itg320x_regs.h.