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mtd_spi_nor.h
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1/*
2 * SPDX-FileCopyrightText: 2016 Eistec AB
3 * SPDX-FileCopyrightText: 2017 OTA keys S.A.
4 * SPDX-License-Identifier: LGPL-2.1-only
5 */
6
7#pragma once
8
22
23#include <stdint.h>
24
25#include "periph_conf.h"
26#include "periph/spi.h"
27#include "periph/gpio.h"
28#include "mtd.h"
29
30#ifdef __cplusplus
31extern "C"
32{
33#endif
34
38typedef struct {
39 uint8_t rdid;
40 uint8_t wren;
41 uint8_t rdsr;
42 uint8_t wrsr;
43 uint8_t read;
44 uint8_t read_fast;
45 uint8_t page_program;
46 uint8_t sector_erase;
49 uint8_t chip_erase;
50 uint8_t sleep;
51 uint8_t wake;
52 /* TODO: enter 4 byte address mode for large memories */
54
60typedef struct __attribute__((packed)) {
61 uint8_t bank;
62 uint8_t manuf;
63 uint8_t device[2];
65
71#define JEDEC_NEXT_BANK (0x7f)
72
78#define JEDEC_BANK_MAX (10)
79
83#define SPI_NOR_F_SECT_4K (1)
84
88#define SPI_NOR_F_SECT_32K (2)
89
93#define SPI_NOR_F_SECT_64K (4)
94
113
155
159extern const mtd_desc_t mtd_spi_nor_driver;
160
161/* Available opcode tables for known devices */
162/* Defined in mtd_spi_nor_configs.c */
171
178
179#ifdef __cplusplus
180}
181#endif
182
spi_clk_t
Definition periph_cpu.h:348
Low-level GPIO peripheral driver interface definitions.
const mtd_spi_nor_opcode_t mtd_spi_nor_opcode_default
Default command opcodes.
const mtd_desc_t mtd_spi_nor_driver
NOR flash SPI MTD device operations table.
const mtd_spi_nor_opcode_t mtd_spi_nor_opcode_default_4bytes
Default 4-byte addresses opcodes.
struct mtd_desc mtd_desc_t
MTD driver interface.
Definition mtd.h:100
spi_mode_t
Support SPI modes.
Definition periph_cpu.h:39
Low-level SPI peripheral driver interface definition.
MTD device descriptor.
Definition mtd.h:108
Internal representation of JEDEC memory ID codes.
Definition mtd_spi_nor.h:60
uint8_t device[2]
Device ID, 2 bytes.
Definition mtd_spi_nor.h:63
uint8_t bank
Manufacturer ID bank number, 1 through 10, see JEP106.
Definition mtd_spi_nor.h:61
uint8_t manuf
Manufacturer ID, 1 byte.
Definition mtd_spi_nor.h:62
SPI NOR flash opcode table.
Definition mtd_spi_nor.h:38
uint8_t read_fast
Read data bytes, 3 byte address, at higher speed.
Definition mtd_spi_nor.h:44
uint8_t wrsr
Write status register.
Definition mtd_spi_nor.h:42
uint8_t block_erase_32k
32KiB block erase
Definition mtd_spi_nor.h:47
uint8_t page_program
Page program.
Definition mtd_spi_nor.h:45
uint8_t read
Read data bytes, 3 byte address.
Definition mtd_spi_nor.h:43
uint8_t chip_erase
Chip erase.
Definition mtd_spi_nor.h:49
uint8_t block_erase_64k
Block erase (usually 64 KiB)
Definition mtd_spi_nor.h:48
uint8_t wake
Release from deep power down.
Definition mtd_spi_nor.h:51
uint8_t sleep
Deep power down.
Definition mtd_spi_nor.h:50
uint8_t sector_erase
Block erase 4 KiB.
Definition mtd_spi_nor.h:46
uint8_t rdid
Read identification (JEDEC ID)
Definition mtd_spi_nor.h:39
uint8_t wren
Write enable.
Definition mtd_spi_nor.h:40
uint8_t rdsr
Read status register.
Definition mtd_spi_nor.h:41
Compile-time parameters for a serial flash device.
Definition mtd_spi_nor.h:98
uint32_t wait_chip_wake_up
Chip wake up time in µs.
gpio_t hold
HOLD pin GPIO handle.
gpio_t wp
Write Protect pin GPIO handle.
uint16_t flag
Config flags.
spi_clk_t clk
SPI clock.
const mtd_spi_nor_opcode_t * opcode
Opcode table for the device.
Definition mtd_spi_nor.h:99
spi_t spi
SPI bus the device is connected to.
spi_mode_t mode
SPI mode.
uint32_t wait_sector_erase
4KB sector erase wait time in µs
uint32_t wait_chip_erase
Full chip erase wait time in µs.
gpio_t cs
CS pin GPIO handle.
uint32_t wait_32k_erase
32KB page erase wait time in µs
uint32_t wait_64k_erase
64KB page erase wait time in µs
Device descriptor for serial flash memory devices.
uint32_t page_addr_mask
bitmask to corresponding to the page address
mtd_jedec_id_t jedec_id
JEDEC ID of the chip.
mtd_dev_t base
inherit from mtd_dev_t object
const mtd_spi_nor_params_t * params
SPI NOR params.
uint8_t sec_addr_shift
number of right shifts to get the address to the start of the sector
uint32_t sec_addr_mask
bitmask to corresponding to the sector address
uint8_t page_addr_shift
number of right shifts to get the address to the start of the page
uint8_t addr_width
number of address bytes