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mtd_spi_nor.h
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1/*
2 * Copyright (C) 2016 Eistec AB
3 * 2017 OTA keys S.A.
4 *
5 * This file is subject to the terms and conditions of the GNU Lesser
6 * General Public License v2.1. See the file LICENSE in the top level
7 * directory for more details.
8 */
9
24#ifndef MTD_SPI_NOR_H
25#define MTD_SPI_NOR_H
26
27#include <stdint.h>
28
29#include "periph_conf.h"
30#include "periph/spi.h"
31#include "periph/gpio.h"
32#include "mtd.h"
33
34#ifdef __cplusplus
35extern "C"
36{
37#endif
38
42typedef struct {
43 uint8_t rdid;
44 uint8_t wren;
45 uint8_t rdsr;
46 uint8_t wrsr;
47 uint8_t read;
48 uint8_t read_fast;
49 uint8_t page_program;
50 uint8_t sector_erase;
53 uint8_t chip_erase;
54 uint8_t sleep;
55 uint8_t wake;
56 /* TODO: enter 4 byte address mode for large memories */
58
64typedef struct __attribute__((packed)) {
65 uint8_t bank;
66 uint8_t manuf;
67 uint8_t device[2];
69
75#define JEDEC_NEXT_BANK (0x7f)
76
82#define JEDEC_BANK_MAX (10)
83
87#define SPI_NOR_F_SECT_4K (1)
88
92#define SPI_NOR_F_SECT_32K (2)
93
97#define SPI_NOR_F_SECT_64K (4)
98
117
159
163extern const mtd_desc_t mtd_spi_nor_driver;
164
165/* Available opcode tables for known devices */
166/* Defined in mtd_spi_nor_configs.c */
175
182
183#ifdef __cplusplus
184}
185#endif
186
187#endif /* MTD_SPI_NOR_H */
spi_clk_t
Definition periph_cpu.h:352
Low-level GPIO peripheral driver interface definitions.
const mtd_spi_nor_opcode_t mtd_spi_nor_opcode_default
Default command opcodes.
const mtd_desc_t mtd_spi_nor_driver
NOR flash SPI MTD device operations table.
const mtd_spi_nor_opcode_t mtd_spi_nor_opcode_default_4bytes
Default 4-byte addresses opcodes.
spi_mode_t
Support SPI modes.
Definition periph_cpu.h:43
Low-level SPI peripheral driver interface definition.
MTD driver interface.
Definition mtd.h:204
MTD device descriptor.
Definition mtd.h:112
Internal representation of JEDEC memory ID codes.
Definition mtd_spi_nor.h:64
uint8_t bank
Manufacturer ID bank number, 1 through 10, see JEP106.
Definition mtd_spi_nor.h:65
uint8_t manuf
Manufacturer ID, 1 byte.
Definition mtd_spi_nor.h:66
SPI NOR flash opcode table.
Definition mtd_spi_nor.h:42
uint8_t read_fast
Read data bytes, 3 byte address, at higher speed.
Definition mtd_spi_nor.h:48
uint8_t wrsr
Write status register.
Definition mtd_spi_nor.h:46
uint8_t block_erase_32k
32KiB block erase
Definition mtd_spi_nor.h:51
uint8_t page_program
Page program.
Definition mtd_spi_nor.h:49
uint8_t read
Read data bytes, 3 byte address.
Definition mtd_spi_nor.h:47
uint8_t chip_erase
Chip erase.
Definition mtd_spi_nor.h:53
uint8_t block_erase_64k
Block erase (usually 64 KiB)
Definition mtd_spi_nor.h:52
uint8_t wake
Release from deep power down.
Definition mtd_spi_nor.h:55
uint8_t sleep
Deep power down.
Definition mtd_spi_nor.h:54
uint8_t sector_erase
Block erase 4 KiB.
Definition mtd_spi_nor.h:50
uint8_t rdid
Read identification (JEDEC ID)
Definition mtd_spi_nor.h:43
uint8_t wren
Write enable.
Definition mtd_spi_nor.h:44
uint8_t rdsr
Read status register.
Definition mtd_spi_nor.h:45
Compile-time parameters for a serial flash device.
uint32_t wait_chip_wake_up
Chip wake up time in µs.
gpio_t hold
HOLD pin GPIO handle.
gpio_t wp
Write Protect pin GPIO handle.
uint16_t flag
Config flags.
spi_clk_t clk
SPI clock.
const mtd_spi_nor_opcode_t * opcode
Opcode table for the device.
spi_t spi
SPI bus the device is connected to.
spi_mode_t mode
SPI mode.
uint32_t wait_sector_erase
4KB sector erase wait time in µs
uint32_t wait_chip_erase
Full chip erase wait time in µs.
gpio_t cs
CS pin GPIO handle.
uint32_t wait_32k_erase
32KB page erase wait time in µs
uint32_t wait_64k_erase
64KB page erase wait time in µs
Device descriptor for serial flash memory devices.
uint32_t page_addr_mask
bitmask to corresponding to the page address
mtd_jedec_id_t jedec_id
JEDEC ID of the chip.
mtd_dev_t base
inherit from mtd_dev_t object
const mtd_spi_nor_params_t * params
SPI NOR params.
uint8_t sec_addr_shift
number of right shifts to get the address to the start of the sector
uint32_t sec_addr_mask
bitmask to corresponding to the sector address
uint8_t page_addr_shift
number of right shifts to get the address to the start of the page
uint8_t addr_width
number of address bytes