FCFG registers. More...
FCFG registers.
Definition at line 35 of file cc26x0_cc13x0_fcfg.h.
#include <cc26x0_cc13x0_fcfg.h>
Data Fields | |
| uint8_t | __reserved1 [0xA0] | 
| Reserved.   | |
| reg32_t | MISC_CONF_1 | 
| misc config   | |
| reg32_t | __reserved2 [8] | 
| Reserved.   | |
| reg32_t | CONFIG_RF_FRONTEND_DIV5 | 
| config of RF frontend in divide-by-5 mode   | |
| reg32_t | CONFIG_RF_FRONTEND_DIV6 | 
| config of RF frontend in divide-by-6 mode   | |
| reg32_t | CONFIG_RF_FRONTEND_DIV10 | 
| config of RF frontend in divide-by-10 mode   | |
| reg32_t | CONFIG_RF_FRONTEND_DIV12 | 
| config of RF frontend in divide-by-12 mode   | |
| reg32_t | CONFIG_RF_FRONTEND_DIV15 | 
| config of RF frontend in divide-by-15 mode   | |
| reg32_t | CONFIG_RF_FRONTEND_DIV30 | 
| config of RF frontend in divide-by-30 mode   | |
| reg32_t | CONFIG_SYNTH_DIV5 | 
| config of synthesizer in divide-by-5-mode   | |
| reg32_t | CONFIG_SYNTH_DIV6 | 
| config of synthesizer in divide-by-5-mode   | |
| reg32_t | CONFIG_SYNTH_DIV10 | 
| config of synthesizer in divide-by-10-mode   | |
| reg32_t | CONFIG_SYNTH_DIV12 | 
| config of synthesizer in divide-by-12-mode   | |
| reg32_t | CONFIG_SYNTH_DIV15 | 
| config of synthesizer in divide-by-15-mode   | |
| reg32_t | CONFIG_SYNTH_DIV30 | 
| config of synthesizer in divide-by-30-mode   | |
| reg32_t | CONFIG_MISC_ADC_DIV5 | 
| config of IFADC in divide-by-5-mode   | |
| reg32_t | CONFIG_MISC_ADC_DIV6 | 
| config of IFADC in divide-by-6-mode   | |
| reg32_t | CONFIG_MISC_ADC_DIV10 | 
| config of IFADC in divide-by-10-mode   | |
| reg32_t | CONFIG_MISC_ADC_DIV12 | 
| config of IFADC in divide-by-12-mode   | |
| reg32_t | CONFIG_MISC_ADC_DIV15 | 
| config of IFADC in divide-by-15-mode   | |
| reg32_t | CONFIG_MISC_ADC_DIV30 | 
| config of IFADC in divide-by-30-mode   | |
| reg32_t | __reserved3 [3] | 
| Reserved.   | |
| reg32_t | SHDW_DIE_ID_0 | 
| shadow of JTAG_TAP::EFUSE::DIE_ID_0.   | |
| reg32_t | SHDW_DIE_ID_1 | 
| shadow of JTAG_TAP::EFUSE::DIE_ID_1.   | |
| reg32_t | SHDW_DIE_ID_2 | 
| shadow of JTAG_TAP::EFUSE::DIE_ID_2.   | |
| reg32_t | SHDW_DIE_ID_3 | 
| shadow of JTAG_TAP::EFUSE::DIE_ID_3.   | |
| reg32_t | __reserved4 [4] | 
| Reserved.   | |
| reg32_t | SHDW_OSC_BIAS_LDO_TRIM | 
| shadow of JTAG_TAP::EFUSE::BIAS_LDO_TIM.   | |
| reg32_t | SHDW_ANA_TRIM | 
| shadow of JTAG_TAP::EFUSE::ANA_TIM.   | |
| reg32_t | __reserved5 [9] | 
| Reserved.   | |
| reg32_t | FLASH_NUMBER | 
| number of manufactoring lot that produced this unit   | |
| reg32_t | FLASH_COORDINATE | 
| X and Y coordinates of this unit on the wafer.   | |
| reg32_t | FLASH_E_P | 
| flash erase and program setup time   | |
| reg32_t | FLASH_C_E_P_R | 
| flash compaction, execute, program, and read   | |
| reg32_t | FLASH_P_R_PV | 
| flash program, read, and program verify   | |
| reg32_t | FLASH_EH_SEQ | 
| flash erase hold and sequence   | |
| reg32_t | FLASH_VHV_E | 
| flash VHV erase   | |
| reg32_t | FLASH_PP | 
| flash program pulse   | |
| reg32_t | FLASH_PROG_EP | 
| flash program and erase pulse   | |
| reg32_t | FLASH_ERA_PW | 
| flash erase pulse width   | |
| reg32_t | FLASH_VHV | 
| flash VHV   | |
| reg32_t | FLASH_VHV_PV | 
| flash VHV program verify   | |
| reg32_t | FLASH_V | 
| flash voltages   | |
| reg32_t | __reserved6 [0x3E] | 
| Reserved.   | |
| reg32_t | USER_ID | 
| user identification   | |
| reg32_t | __reserved7 [6] | 
| Reserved.   | |
| reg32_t | FLASH_OTP_DATA3 | 
| flash OTP data 3   | |
| reg32_t | ANA2_TRIM | 
| misc analog trim   | |
| reg32_t | LDO_TRIM | 
| LDO trim.   | |
| reg32_t | __reserved8 [0xB] | 
| Reserved.   | |
| reg32_t | MAC_BLE_0 | 
| MAC BLE address 0.   | |
| reg32_t | MAC_BLE_1 | 
| MAC BLE address 1.   | |
| reg32_t | MAC_15_4_0 | 
| MAC IEEE 820.15.4 address 0.   | |
| reg32_t | MAC_15_4_1 | 
| MAC IEEE 820.15.4 address 1.   | |
| reg32_t | __reserved9 [4] | 
| Reserved.   | |
| reg32_t | FLASH_OTP_DATA4 | 
| flash OTP data 4   | |
| reg32_t | MISC_TRIM | 
| misc trim parameters   | |
| reg32_t | RCOSC_HF_TEMPCOMP | 
| RFOSC HF temperature compensation.   | |
| reg32_t | __reserved10 | 
| Reserved.   | |
| reg32_t | ICEPICK_DEVICE_ID | 
| IcePick device identification.   | |
| reg32_t | FCFG1_REVISION | 
| FCFG1 revision.   | |
| reg32_t | MISC_OTP_DATA | 
| misc OTP data   | |
| reg32_t | __reserved11 [8] | 
| Reserved.   | |
| reg32_t | IOCONF | 
| IO config.   | |
| reg32_t | __reserved12 | 
| Reserved.   | |
| reg32_t | CONFIG_IF_ADC | 
| config of IF_ADC   | |
| reg32_t | CONFIG_OSC_TOP | 
| config of OSC   | |
| reg32_t | CONFIG_RF_FRONTEND | 
| config of RF frontend in dividy-by-2-mode   | |
| reg32_t | CONFIG_SYNTH | 
| config of synthesizer in dividy-by-2-mode   | |
| reg32_t | SOC_ADC_ABS_GAIN | 
| AUX_ADC gain in absolute reference mode.   | |
| reg32_t | SOC_ADC_REL_GAIN | 
| AUX_ADC gain in relative reference mode.   | |
| reg32_t | __reserved13 | 
| Reserved.   | |
| reg32_t | SOC_ADC_OFFSET_INT | 
| AUX_ADC temperature offsets in absolute reference mode.   | |
| reg32_t | SOC_ADC_REF_TRIM_AND_OFFSET_EXT | 
| AUX_ADC reference trim and offset of external reference mode.   | |
| reg32_t | AMPCOMP_TH1 | 
| amplitude compensation threshold 1   | |
| reg32_t | AMPCOMP_TH2 | 
| amplitude compensation threshold 2   | |
| reg32_t | AMPCOMP_CTRL1 | 
| amplitude compensation control   | |
| reg32_t | ANABYPASS_VALUE2 | 
| analog bypass value for OSC   | |
| reg32_t | CONFIG_MISC_ADC | 
| config of IFADC in divide-by-2-mode   | |
| reg32_t | __reserved14 | 
| Reserved.   | |
| reg32_t | VOLT_TRIM | 
| voltage trim   | |
| reg32_t | OSC_CONF | 
| OSC configuration.   | |
| reg32_t | __reserved15 | 
| Reserved.   | |
| reg32_t | CAP_TRIM | 
| capacitor trim (it says 'capasitor' in the manual - if you know what that is ;-)   | |
| reg32_t | MISC_OTP_DATA_1 | 
| misc OSC control   | |
| reg32_t | PWD_CURR_20C | 
| power down current control 20C   | |
| reg32_t | PWD_CURR_35C | 
| power down current control 35C   | |
| reg32_t | PWD_CURR_50C | 
| power down current control 50C   | |
| reg32_t | PWD_CURR_65C | 
| power down current control 65C   | |
| reg32_t | PWD_CURR_80C | 
| power down current control 80C   | |
| reg32_t | PWD_CURR_95C | 
| power down current control 95C   | |
| reg32_t | PWD_CURR_110C | 
| power down current control 110C   | |
| reg32_t | PWD_CURR_125C | 
| power down current control 125C   | |
| reg8_t | __reserved1 [0xA0] | 
| Reserved.   | |
| reg32_t | MISC_CONF_2 | 
| misc config   | |
| reg32_t | HPOSC_MEAS_5 | 
| Internal.   | |
| reg32_t | HPOSC_MEAS_4 | 
| Internal.   | |
| reg32_t | HPOSC_MEAS_3 | 
| Internal.   | |
| reg32_t | HPOSC_MEAS_2 | 
| Internal.   | |
| reg32_t | HPOSC_MEAS_1 | 
| Internal.   | |
| reg32_t | CONFIG_FE_CC26 | 
| Internal.   | |
| reg32_t | CONFIG_FE_CC13 | 
| Internal.   | |
| reg32_t | CONFIG_RF_COMMON | 
| Internal.   | |
| reg32_t | CONFIG_SYNTH_DIV2_CC26_2G4 | 
| Config of synthesizer in divide-by-2-mode.   | |
| reg32_t | CONFIG_SYNTH_DIV2_CC13_2G4 | 
| Config of synthesizer in divide-by-2-mode.   | |
| reg32_t | CONFIG_SYNTH_DIV2_CC26_1G | 
| Config of synthesizer in divide-by-2-mode.   | |
| reg32_t | CONFIG_SYNTH_DIV2_CC13_1G | 
| Config of synthesizer in divide-by-2-mode.   | |
| reg32_t | CONFIG_SYNTH_DIV4_CC26 | 
| Config of synthesizer in divide-by-4-mode.   | |
| reg32_t | CONFIG_SYNTH_DIV4_CC13 | 
| Config of synthesizer in divide-by-4-mode.   | |
| reg32_t | CONFIG_SYNTH_DIV6_CC26 | 
| Config of synthesizer in divide-by-5-mode.   | |
| reg32_t | CONFIG_SYNTH_DIV6_CC13 | 
| Config of synthesizer in divide-by-5-mode.   | |
| reg32_t | CONFIG_SYNTH_DIV12_CC26 | 
| Config of synthesizer in divide-by-12-mode.   | |
| reg32_t | CONFIG_SYNTH_DIV12_CC13 | 
| Config of synthesizer in divide-by-12-mode.   | |
| reg32_t | FREQ_OFFSET | 
| Internal.   | |
| reg32_t | __reserved16 [0xC] | 
| Reserved.   | |
| reg32_t | __reserved17 [0x7] | 
| Reserved.   | |
| reg32_t | __reserved18 [0x3] | 
| Reserved.   | |
| reg32_t | DAC_BIAS_CNF | 
| Internal.   | |
| reg32_t | __reserved19 [0x2] | 
| Reserved.   | |
| reg32_t | TFW_PROBE | 
| Internal.   | |
| reg32_t | TFW_FT | 
| Internal.   | |
| reg32_t | DAC_CAL0 | 
| Internal.   | |
| reg32_t | DAC_CAL1 | 
| Internal.   | |
| reg32_t | DAC_CAL2 | 
| Internal.   | |
| reg32_t | DAC_CAL3 | 
| Internal.   | |
| uint8_t fcfg_regs_t::__reserved1[0xA0] | 
Reserved.
Definition at line 36 of file cc26x0_cc13x0_fcfg.h.
| reg8_t fcfg_regs_t::__reserved1[0xA0] | 
Reserved.
Definition at line 26 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::__reserved10 | 
Reserved.
Definition at line 95 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::__reserved11 | 
Reserved.
Definition at line 99 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::__reserved12 | 
Reserved.
Definition at line 101 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::__reserved13 | 
Reserved.
Definition at line 108 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::__reserved14 | 
Reserved.
Definition at line 116 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::__reserved15 | 
Reserved.
Definition at line 119 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::__reserved16[0xC] | 
Reserved.
Definition at line 107 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::__reserved17[0x7] | 
Reserved.
Definition at line 112 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::__reserved18[0x3] | 
Reserved.
Definition at line 115 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::__reserved19[0x2] | 
Reserved.
Definition at line 117 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::__reserved2 | 
Reserved.
Definition at line 39 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::__reserved3 | 
Reserved.
Definition at line 58 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::__reserved4 | 
Reserved.
Definition at line 63 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::__reserved5 | 
Reserved.
Definition at line 66 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::__reserved6 | 
Reserved.
Definition at line 80 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::__reserved7 | 
Reserved.
Definition at line 82 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::__reserved8 | 
Reserved.
Definition at line 86 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::__reserved9 | 
Reserved.
Definition at line 91 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::AMPCOMP_CTRL1 | 
| reg32_t fcfg_regs_t::AMPCOMP_TH1 | 
| reg32_t fcfg_regs_t::AMPCOMP_TH2 | 
| reg32_t fcfg_regs_t::ANA2_TRIM | 
| reg32_t fcfg_regs_t::ANABYPASS_VALUE2 | 
| reg32_t fcfg_regs_t::CAP_TRIM | 
capacitor trim (it says 'capasitor' in the manual - if you know what that is ;-)
Definition at line 120 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_FE_CC13 | 
Internal.
Definition at line 36 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_FE_CC26 | 
Internal.
Definition at line 35 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_IF_ADC | 
| reg32_t fcfg_regs_t::CONFIG_MISC_ADC | 
config of IFADC in divide-by-2-mode
Definition at line 115 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_MISC_ADC_DIV10 | 
config of IFADC in divide-by-10-mode
Definition at line 54 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_MISC_ADC_DIV12 | 
config of IFADC in divide-by-12-mode
Definition at line 55 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_MISC_ADC_DIV15 | 
config of IFADC in divide-by-15-mode
Definition at line 56 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_MISC_ADC_DIV30 | 
config of IFADC in divide-by-30-mode
Definition at line 57 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_MISC_ADC_DIV5 | 
config of IFADC in divide-by-5-mode
Definition at line 52 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_MISC_ADC_DIV6 | 
config of IFADC in divide-by-6-mode
Definition at line 53 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_OSC_TOP | 
| reg32_t fcfg_regs_t::CONFIG_RF_COMMON | 
Internal.
Definition at line 37 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_RF_FRONTEND | 
config of RF frontend in dividy-by-2-mode
Definition at line 104 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_RF_FRONTEND_DIV10 | 
config of RF frontend in divide-by-10 mode
Definition at line 42 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_RF_FRONTEND_DIV12 | 
config of RF frontend in divide-by-12 mode
Definition at line 43 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_RF_FRONTEND_DIV15 | 
config of RF frontend in divide-by-15 mode
Definition at line 44 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_RF_FRONTEND_DIV30 | 
config of RF frontend in divide-by-30 mode
Definition at line 45 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_RF_FRONTEND_DIV5 | 
config of RF frontend in divide-by-5 mode
Definition at line 40 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_RF_FRONTEND_DIV6 | 
config of RF frontend in divide-by-6 mode
Definition at line 41 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH | 
config of synthesizer in dividy-by-2-mode
Definition at line 105 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV10 | 
config of synthesizer in divide-by-10-mode
Config of synthesizer in divide-by-10-mode.
Definition at line 48 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV12 | 
config of synthesizer in divide-by-12-mode
Definition at line 49 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV12_CC13 | 
Config of synthesizer in divide-by-12-mode.
Definition at line 49 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV12_CC26 | 
Config of synthesizer in divide-by-12-mode.
Definition at line 48 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV15 | 
config of synthesizer in divide-by-15-mode
Config of synthesizer in divide-by-15-mode.
Definition at line 50 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV2_CC13_1G | 
Config of synthesizer in divide-by-2-mode.
Definition at line 41 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV2_CC13_2G4 | 
Config of synthesizer in divide-by-2-mode.
Definition at line 39 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV2_CC26_1G | 
Config of synthesizer in divide-by-2-mode.
Definition at line 40 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV2_CC26_2G4 | 
Config of synthesizer in divide-by-2-mode.
Definition at line 38 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV30 | 
config of synthesizer in divide-by-30-mode
Config of synthesizer in divide-by-30-mode.
Definition at line 51 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV4_CC13 | 
Config of synthesizer in divide-by-4-mode.
Definition at line 43 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV4_CC26 | 
Config of synthesizer in divide-by-4-mode.
Definition at line 42 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV5 | 
config of synthesizer in divide-by-5-mode
Config of synthesizer in divide-by-5-mode.
Definition at line 46 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV6 | 
config of synthesizer in divide-by-5-mode
Definition at line 47 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV6_CC13 | 
Config of synthesizer in divide-by-5-mode.
Definition at line 46 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::CONFIG_SYNTH_DIV6_CC26 | 
Config of synthesizer in divide-by-5-mode.
Definition at line 45 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::DAC_BIAS_CNF | 
Internal.
Definition at line 116 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::DAC_CAL0 | 
Internal.
Definition at line 120 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::DAC_CAL1 | 
Internal.
Definition at line 121 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::DAC_CAL2 | 
Internal.
Definition at line 122 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::DAC_CAL3 | 
Internal.
Definition at line 123 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::FCFG1_REVISION | 
| reg32_t fcfg_regs_t::FLASH_C_E_P_R | 
flash compaction, execute, program, and read
Internal.
Definition at line 70 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::FLASH_COORDINATE | 
X and Y coordinates of this unit on the wafer.
Chip coordinates on a wafer.
Definition at line 68 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::FLASH_E_P | 
| reg32_t fcfg_regs_t::FLASH_EH_SEQ | 
| reg32_t fcfg_regs_t::FLASH_ERA_PW | 
| reg32_t fcfg_regs_t::FLASH_NUMBER | 
number of manufactoring lot that produced this unit
Manufacturing lot number.
Definition at line 67 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::FLASH_OTP_DATA3 | 
| reg32_t fcfg_regs_t::FLASH_OTP_DATA4 | 
| reg32_t fcfg_regs_t::FLASH_P_R_PV | 
flash program, read, and program verify
Internal.
Definition at line 71 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::FLASH_PP | 
| reg32_t fcfg_regs_t::FLASH_PROG_EP | 
| reg32_t fcfg_regs_t::FLASH_V | 
| reg32_t fcfg_regs_t::FLASH_VHV | 
| reg32_t fcfg_regs_t::FLASH_VHV_E | 
| reg32_t fcfg_regs_t::FLASH_VHV_PV | 
| reg32_t fcfg_regs_t::FREQ_OFFSET | 
Internal.
Definition at line 104 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::HPOSC_MEAS_1 | 
Internal.
Definition at line 34 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::HPOSC_MEAS_2 | 
Internal.
Definition at line 33 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::HPOSC_MEAS_3 | 
Internal.
Definition at line 32 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::HPOSC_MEAS_4 | 
Internal.
Definition at line 31 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::HPOSC_MEAS_5 | 
Internal.
Definition at line 30 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::ICEPICK_DEVICE_ID | 
IcePick device identification.
IcePick Device Identification.
Definition at line 96 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::IOCONF | 
| reg32_t fcfg_regs_t::LDO_TRIM | 
| reg32_t fcfg_regs_t::MAC_15_4_0 | 
MAC IEEE 820.15.4 address 0.
MAC IEEE 802.15.4 address 0.
Definition at line 89 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::MAC_15_4_1 | 
MAC IEEE 820.15.4 address 1.
MAC IEEE 802.15.4 address 1.
Definition at line 90 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::MAC_BLE_0 | 
MAC BLE address 0.
Definition at line 87 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::MAC_BLE_1 | 
MAC BLE address 1.
Definition at line 88 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::MISC_CONF_1 | 
misc config
Definition at line 38 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::MISC_CONF_2 | 
misc config
Definition at line 28 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::MISC_OTP_DATA | 
| reg32_t fcfg_regs_t::MISC_OTP_DATA_1 | 
| reg32_t fcfg_regs_t::MISC_TRIM | 
misc trim parameters
Miscellaneous trim parameters.
Definition at line 93 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::OSC_CONF | 
OSC configuration.
Definition at line 118 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::PWD_CURR_110C | 
power down current control 110C
Definition at line 128 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::PWD_CURR_125C | 
power down current control 125C
Definition at line 129 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::PWD_CURR_20C | 
power down current control 20C
Definition at line 122 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::PWD_CURR_35C | 
power down current control 35C
Definition at line 123 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::PWD_CURR_50C | 
power down current control 50C
Definition at line 124 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::PWD_CURR_65C | 
power down current control 65C
Definition at line 125 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::PWD_CURR_80C | 
power down current control 80C
Definition at line 126 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::PWD_CURR_95C | 
power down current control 95C
Definition at line 127 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::RCOSC_HF_TEMPCOMP | 
| reg32_t fcfg_regs_t::SHDW_ANA_TRIM | 
| reg32_t fcfg_regs_t::SHDW_DIE_ID_0 | 
shadow of JTAG_TAP::EFUSE::DIE_ID_0.
Shadow of JTAG_TAP::EFUSE::DIE_ID_0.
Definition at line 59 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::SHDW_DIE_ID_1 | 
shadow of JTAG_TAP::EFUSE::DIE_ID_1.
Shadow of JTAG_TAP::EFUSE::DIE_ID_1.
Definition at line 60 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::SHDW_DIE_ID_2 | 
shadow of JTAG_TAP::EFUSE::DIE_ID_2.
Shadow of JTAG_TAP::EFUSE::DIE_ID_2.
Definition at line 61 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::SHDW_DIE_ID_3 | 
shadow of JTAG_TAP::EFUSE::DIE_ID_3.
Shadow of JTAG_TAP::EFUSE::DIE_ID_3.
Definition at line 62 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::SHDW_OSC_BIAS_LDO_TRIM | 
shadow of JTAG_TAP::EFUSE::BIAS_LDO_TIM.
Internal.
Definition at line 64 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::SOC_ADC_ABS_GAIN | 
AUX_ADC gain in absolute reference mode.
Definition at line 106 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::SOC_ADC_OFFSET_INT | 
AUX_ADC temperature offsets in absolute reference mode.
Definition at line 109 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::SOC_ADC_REF_TRIM_AND_OFFSET_EXT | 
AUX_ADC reference trim and offset of external reference mode.
Internal.
Definition at line 110 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::SOC_ADC_REL_GAIN | 
AUX_ADC gain in relative reference mode.
Definition at line 107 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::TFW_FT | 
Internal.
Definition at line 119 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::TFW_PROBE | 
Internal.
Definition at line 118 of file cc26x2_cc13x2_fcfg.h.
| reg32_t fcfg_regs_t::USER_ID | 
user identification
Definition at line 81 of file cc26x0_cc13x0_fcfg.h.
| reg32_t fcfg_regs_t::VOLT_TRIM |