18#include "periph_cpu.h" 
   28#ifndef CLOCK_CORECLOCK 
   29#define CLOCK_CORECLOCK     MHZ(120) 
   37#define EXTERNAL_OSC32_SOURCE                   1 
   38#define INTERNAL_OSC32_SOURCE                   0 
   39#define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE     0 
   46#define USE_VREG_BUCK       (1) 
   52#define ADC_GCLK_SRC                        SAM0_GCLK_PERIPH     
   53#define ADC_PRESCALER                       ADC_CTRLA_PRESCALER_DIV8 
   54#define ADC_NEG_INPUT                       ADC_INPUTCTRL_MUXNEG(0x18u) 
   55#define ADC_REF_DEFAULT                     ADC_REFCTRL_REFSEL_INTVCC1 
   67#define ADC_NUMOF                           ARRAY_SIZE(adc_channels) 
   75#define DAC_CLOCK           SAM0_GCLK_TIMER 
   80#define DAC_VREF            DAC_CTRLB_REFSEL_VREFPU 
   89        .dev      = &(SERCOM5->I2CM),
 
   99#define I2C_NUMOF           ARRAY_SIZE(i2c_config) 
  107#define RTT_FREQUENCY       (32768U) 
  119        .mclk           = &MCLK->APBAMASK.reg,
 
  120        .mclk_mask      = MCLK_APBAMASK_TC0 | MCLK_APBAMASK_TC1,
 
  121        .gclk_id        = TC0_GCLK_ID,
 
  123        .flags          = TC_CTRLA_MODE_COUNT32,
 
  128        .mclk           = &MCLK->APBBMASK.reg,
 
  129        .mclk_mask      = MCLK_APBBMASK_TC2 | MCLK_APBBMASK_TC3,
 
  130        .gclk_id        = TC2_GCLK_ID,
 
  132        .flags          = TC_CTRLA_MODE_COUNT32,
 
  137#define TIMER_0_CHANNELS    2 
  138#define TIMER_0_ISR         isr_tc0 
  141#define TIMER_1_CHANNELS    2 
  142#define TIMER_1_ISR         isr_tc2 
  144#define TIMER_NUMOF         ARRAY_SIZE(timer_config) 
  153        .dev      = &(SERCOM2->SPI),
 
  164        .tx_trigger = SERCOM2_DMAC_ID_TX,
 
  165        .rx_trigger = SERCOM2_DMAC_ID_RX,
 
  168#if !MODULE_PERIPH_UART 
  170        .dev      = &(SERCOM3->SPI),
 
  180#  if MODULE_PERIPH_DMA 
  181        .tx_trigger = SERCOM3_DMAC_ID_TX,
 
  182        .rx_trigger = SERCOM3_DMAC_ID_RX,
 
  186#if MODULE_PERIPH_SPI_ON_QSPI 
  198#  if MODULE_PERIPH_DMA 
  199        .tx_trigger = QSPI_DMAC_ID_TX,
 
  200        .rx_trigger = QSPI_DMAC_ID_RX,
 
  206#define SPI_NUMOF           ARRAY_SIZE(spi_config) 
  218        .device = &USB->DEVICE,
 
  237        .dev      = &SERCOM3->USART,
 
  240  #ifdef MODULE_PERIPH_UART_HW_FC 
  253#define UART_0_ISR          isr_sercom3_2 
  254#define UART_0_ISR_TX       isr_sercom3_0 
  256#define UART_NUMOF          ARRAY_SIZE(uart_config) 
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
 
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
 
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
 
@ UART_PAD_RX_1
select pad 1
 
@ I2C_FLAG_NONE
No flags set.
 
@ SPI_PAD_MISO_2
use pad 2 for MISO line
 
@ SPI_PAD_MISO_0
use pad 0 for MISO line
 
@ UART_FLAG_NONE
No flags set.
 
@ UART_PAD_TX_0
select pad 0
 
@ GPIO_MUX_H
select peripheral function H
 
@ GPIO_MUX_D
select peripheral function D
 
@ GPIO_MUX_C
select peripheral function C
 
@ SPI_PAD_MOSI_3_SCK_1
use pad 3 for MOSI, pad 1 for SCK
 
@ SPI_PAD_MOSI_0_SCK_1
use pad 0 for MOSI, pad 1 for SCK
 
#define ADC1_INPUTCTRL_MUXPOS_PB09
Alias for AIN1.
 
#define SAM0_GCLK_MAIN
120 MHz main clock
 
#define ADC0_INPUTCTRL_MUXPOS_PA04
Alias for AIN4.
 
#define ADC1_INPUTCTRL_MUXPOS_PB08
Alias for AIN0.
 
#define SAM0_QSPI_PIN_CLK
Clock.
 
#define ADC0_INPUTCTRL_MUXPOS_PA05
Alias for AIN5.
 
#define SAM0_QSPI_PIN_DATA_0
D0 / MOSI.
 
#define SAM0_QSPI_PIN_DATA_1
D1 / MISO.
 
#define SAM0_QSPI_MUX
QSPI mux.
 
#define ADC0_INPUTCTRL_MUXPOS_PA06
Alias for AIN6.
 
#define SAM0_GCLK_TIMER
4-8 MHz clock for xTimer
 
#define ADC0_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
 
#define SAM0_GCLK_PERIPH
12-48 MHz (DFLL) clock
 
ADC Channel Configuration.
 
I2C configuration structure.
 
USB peripheral parameters.
 
SPI device configuration.
 
Timer device configuration.
 
UART device configuration.