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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2014 Loci Controls Inc.
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
17
18#include "cpu.h"
19#include "periph_cpu.h"
20
21#include "cfg_clk_default.h"
22#include "cfg_timer_default.h"
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
32static const uart_conf_t uart_config[] = {
33 {
34 .dev = UART0_BASEADDR,
35 .rx_pin = GPIO_PIN(0, 0),
36 .tx_pin = GPIO_PIN(0, 1),
37#ifdef MODULE_PERIPH_UART_HW_FC
38 .cts_pin = GPIO_UNDEF,
39 .rts_pin = GPIO_UNDEF
40#endif
41 }
42};
43
44/* interrupt function name mapping */
45#define UART_0_ISR isr_uart0
46
47/* macros common across all UARTs */
48#define UART_NUMOF ARRAY_SIZE(uart_config)
49
51
56#define I2C_IRQ_PRIO 1
57
58static const i2c_conf_t i2c_config[] = {
59 {
60 .speed = I2C_SPEED_FAST,
61 .scl_pin = GPIO_PIN(0, 2),
62 .sda_pin = GPIO_PIN(0, 4)
63 },
64};
65
66#define I2C_NUMOF ARRAY_SIZE(i2c_config)
68
73static const spi_conf_t spi_config[] = {
74 {
75 .num = 0,
76 .mosi_pin = GPIO_PIN(0, 4),
77 .miso_pin = GPIO_PIN(0, 5),
78 .sck_pin = GPIO_PIN(0, 2),
79 .cs_pin = GPIO_PIN(3, 0)
80 }
81};
82
83#define SPI_NUMOF ARRAY_SIZE(spi_config)
85
90#define SOC_ADC_ADCCON3_EREF SOC_ADC_ADCCON3_EREF_AVDD5
91
92static const adc_conf_t adc_config[] = {
93 GPIO_PIN(0, 6),
94};
95
96#define ADC_NUMOF ARRAY_SIZE(adc_config)
98
99#ifdef __cplusplus
100} /* end extern "C" */
101#endif
102
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition periph_cpu.h:278
Default clock configuration for cc2538 based boards.
#define UART0_BASEADDR
UART0 Instance.
ADC device configuration.
Definition periph_cpu.h:377
I2C configuration structure.
Definition periph_cpu.h:298
SPI device configuration.
Definition periph_cpu.h:336
UART device configuration.
Definition periph_cpu.h:217