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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2024 Marian Buschsieweke
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
18
19#include "cpu.h"
20#include "periph_cpu.h"
21
22#include "cfg_clk_default.h"
23#include "cfg_timer_default.h"
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
33static const uart_conf_t uart_config[] = {
34 {
35 .dev = UART0_BASEADDR,
36 .rx_pin = GPIO_PIN(PORT_A, 0),
37 .tx_pin = GPIO_PIN(PORT_A, 1),
38#ifdef MODULE_PERIPH_UART_HW_FC
39 .cts_pin = GPIO_UNDEF,
40 .rts_pin = GPIO_UNDEF
41#endif
42 }
43};
44
45#define UART_0_ISR isr_uart0
46
47#define UART_NUMOF ARRAY_SIZE(uart_config)
48
50
55#define I2C_IRQ_PRIO 1
56
57static const i2c_conf_t i2c_config[] = {
58 {
59 .speed = I2C_SPEED_FAST,
60 .scl_pin = GPIO_PIN(PORT_A, 2),
61 .sda_pin = GPIO_PIN(PORT_A, 4)
62 },
63};
64
65#define I2C_NUMOF ARRAY_SIZE(i2c_config)
67
72static const spi_conf_t spi_config[] = {
73 {
74 .num = 0,
75 .mosi_pin = GPIO_PIN(PORT_A, 4),
76 .miso_pin = GPIO_PIN(PORT_A, 5),
77 .sck_pin = GPIO_PIN(PORT_A, 2),
78 .cs_pin = GPIO_PIN(PORT_D, 0)
79 }
80};
81
82#define SPI_NUMOF ARRAY_SIZE(spi_config)
84
89#define SOC_ADC_ADCCON3_EREF SOC_ADC_ADCCON3_EREF_AVDD5
90
91static const adc_conf_t adc_config[] = {
92 GPIO_PIN(PORT_A, 6),
93};
94
95#define ADC_NUMOF ARRAY_SIZE(adc_config)
97
98#ifdef __cplusplus
99} /* end extern "C" */
100#endif
101
@ PORT_A
port A
Definition periph_cpu.h:46
@ PORT_D
port D
Definition periph_cpu.h:49
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition periph_cpu.h:278
Default clock configuration for cc2538 based boards.
#define UART0_BASEADDR
UART0 Instance.
ADC device configuration.
Definition periph_cpu.h:377
I2C configuration structure.
Definition periph_cpu.h:298
SPI device configuration.
Definition periph_cpu.h:336
UART device configuration.
Definition periph_cpu.h:217