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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2019 Christian Amsüss <chrysn@fsfe.org>
3 * SPDX-FileCopyrightText: 2021 Freie Universität Berlin
4 * SPDX-License-Identifier: LGPL-2.1-only
5 */
6
7#pragma once
8
20
21#include "periph_cpu.h"
22#include "cfg_clock_32_1.h"
23#include "cfg_rtt_default.h"
24#include "cfg_timer_default.h"
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
38
39static const uart_conf_t uart_config[] = {
40 {
41 .dev = NRF_UARTE0,
42 .rx_pin = GPIO_PIN(0, 13),
43 .tx_pin = GPIO_PIN(0, 15),
44#ifdef MODULE_PERIPH_UART_HW_FC
45 .rts_pin = GPIO_UNDEF,
46 .cts_pin = GPIO_UNDEF,
47#endif
48 .irqn = UARTE0_UART0_IRQn,
49 },
50};
51
52#define UART_0_ISR (isr_uart0)
53
54#define UART_NUMOF ARRAY_SIZE(uart_config)
56
66static const pwm_conf_t pwm_config[] = {
67 {
68 NRF_PWM0,
69 {
70 GPIO_PIN(0, 6),
71 GPIO_PIN(0, 8),
72 GPIO_PIN(1, 9),
73 GPIO_PIN(0, 12),
74 },
75 },
76};
77#define PWM_NUMOF ARRAY_SIZE(pwm_config)
79
84static const spi_conf_t spi_config[] = {
85 {
86 .dev = NRF_SPIM0,
87 .sclk = GPIO_PIN(0, 20),
88 .mosi = GPIO_PIN(0, 22),
89 .miso = GPIO_PIN(0, 24),
90 }
91};
92
93#define SPI_NUMOF ARRAY_SIZE(spi_config)
95
100static const i2c_conf_t i2c_config[] = {
101 {
102 .dev = NRF_TWIM1,
103 .scl = GPIO_PIN(0, 29),
104 .sda = GPIO_PIN(0, 31),
105 .speed = I2C_SPEED_NORMAL
106 }
107};
108#define I2C_NUMOF ARRAY_SIZE(i2c_config)
110
111#ifdef __cplusplus
112}
113#endif
114
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:277
Common clock configuration for the nRF52 based boards.
I2C configuration structure.
Definition periph_cpu.h:298
PWM device configuration.
SPI device configuration.
Definition periph_cpu.h:336
UART device configuration.
Definition periph_cpu.h:217