Configuration of CPU peripherals for STM32 Nucleo-G031K8 board. More...

Detailed Description

Configuration of CPU peripherals for STM32 Nucleo-G031K8 board.

Author: Hudson C. Dalpra dalpr.nosp@m.a.hc.nosp@m.d@gma.nosp@m.il.c.nosp@m.om

Definition in file periph_conf.h.

#include "periph_cpu.h"
#include "clk_conf.h"

Include dependency graph for periph_conf.h:

UART configuration
#define	UART_0_ISR (isr_usart2)

#define	UART_1_ISR (isr_usart1)

#define	UART_NUMOF ARRAY_SIZE(uart_config)

static const uart_conf_t	uart_config []

Macro Definition Documentation

◆ UART_0_ISR

#define UART_0_ISR (isr_usart2)

Definition at line 52 of file periph_conf.h.

◆ UART_1_ISR

#define UART_1_ISR (isr_usart1)

Definition at line 53 of file periph_conf.h.

◆ UART_NUMOF

#define UART_NUMOF ARRAY_SIZE(uart_config)

Definition at line 55 of file periph_conf.h.

Variable Documentation

◆ uart_config

const uart_conf_t uart_config[]

static

Initial value:

= {
    {   
        .dev        = USART2,
        .rcc_mask   = RCC_APBENR1_USART2EN,
        .rx_pin     = GPIO_PIN(PORT_A, 3),
        .tx_pin     = GPIO_PIN(PORT_A, 2),
        .rx_af      = GPIO_AF1,
        .tx_af      = GPIO_AF1,
        .bus        = APB1,
        .irqn       = USART2_IRQn,
    },
    {   
        .dev        = USART1,
        .rcc_mask   = RCC_APBENR2_USART1EN,
        .rx_pin     = GPIO_PIN(PORT_B, 7),
        .tx_pin     = GPIO_PIN(PORT_B, 6),
        .rx_af      = GPIO_AF0,
        .tx_af      = GPIO_AF0,
        .bus        = APB12,
        .irqn       = USART1_IRQn,
    }
}

Definition at line 29 of file periph_conf.h.