Loading...
Searching...
No Matches
periph_conf.h File Reference

Minimal peripheral configuration for STM32U385 (bring-up) More...

Detailed Description

Minimal peripheral configuration for STM32U385 (bring-up)

Author
Adarsh Nair Mullachery adars.nosp@m.h.mu.nosp@m.llach.nosp@m.ery@.nosp@m.tuhh..nosp@m.de

Definition in file periph_conf.h.

#include "periph_cpu.h"
#include "clk_conf.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

#define CONFIG_BOARD_HAS_LSE   1
 

Timer configuration

Note
TIM2 is reserved for PWM (User LED / TIM2_CH1 on PA5). TIM3 is used here as the RIOT timer backend (general-purpose timer).
#define TIMER_NUMOF   ARRAY_SIZE(timer_config)
 
#define TIMER_0_ISR   isr_tim3
 
static const timer_conf_t timer_config []
 

UART configuration

#define UART_0_ISR   (isr_usart1)
 
#define UART_1_ISR   (isr_lpuart1)
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

Macro Definition Documentation

◆ CONFIG_BOARD_HAS_LSE

#define CONFIG_BOARD_HAS_LSE   1

Definition at line 20 of file periph_conf.h.

◆ TIMER_0_ISR

#define TIMER_0_ISR   isr_tim3

Definition at line 48 of file periph_conf.h.

◆ TIMER_NUMOF

#define TIMER_NUMOF   ARRAY_SIZE(timer_config)

Definition at line 46 of file periph_conf.h.

◆ UART_0_ISR

#define UART_0_ISR   (isr_usart1)

Definition at line 84 of file periph_conf.h.

◆ UART_1_ISR

#define UART_1_ISR   (isr_lpuart1)

Definition at line 85 of file periph_conf.h.

◆ UART_NUMOF

#define UART_NUMOF   ARRAY_SIZE(uart_config)

Definition at line 86 of file periph_conf.h.

Variable Documentation

◆ timer_config

const timer_conf_t timer_config[]
static
Initial value:
= {
{
.dev = TIM3,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR1_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn,
}
}
@ APB1
Advanced Peripheral Bus 1.
Definition periph_cpu.h:75

Definition at line 36 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static
Initial value:
= {
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB2,
.irqn = USART1_IRQn,
.type = STM32_USART,
.clk_src = 0,
},
{
.dev = LPUART1,
.rcc_mask = RCC_APB3ENR_LPUART1EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF8,
.tx_af = GPIO_AF8,
.bus = APB3,
.irqn = LPUART1_IRQn,
.type = STM32_LPUART,
.clk_src = 0,
}
}
@ PORT_A
port A
Definition periph_cpu.h:43
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:42
@ GPIO_AF8
use alternate function 8
Definition cpu_gpio.h:107
@ GPIO_AF7
use alternate function 7
Definition cpu_gpio.h:105
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition cpu_uart.h:35
@ STM32_USART
STM32 USART module type.
Definition cpu_uart.h:34
@ APB2
Advanced Peripheral Bus 2.
Definition periph_cpu.h:76

Definition at line 55 of file periph_conf.h.