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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2015-2020 Freie Universität Berlin
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
18
19#include "cpu.h"
20#include "periph_cpu.h"
21#include "em_cmu.h"
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
31#ifndef CLOCK_HF
32#define CLOCK_HF cmuSelect_HFXO
33#endif
34#ifndef CLOCK_CORE_DIV
35#define CLOCK_CORE_DIV cmuClkDiv_1
36#endif
37#ifndef CLOCK_LFA
38#define CLOCK_LFA cmuSelect_LFXO
39#endif
40#ifndef CLOCK_LFB
41#define CLOCK_LFB cmuSelect_LFXO
42#endif
44
49static const adc_conf_t adc_config[] = {
50 {
51 .dev = ADC0,
52 .cmu = cmuClock_ADC0,
53 }
54};
55
56static const adc_chan_conf_t adc_channel_config[] = {
57 {
58 .dev = 0,
59 .input = adcSingleInputTemp,
60 .reference = adcRef1V25,
61 .acq_time = adcAcqTime8
62 },
63 {
64 .dev = 0,
65 .input = adcSingleInputVDDDiv3,
66 .reference = adcRef1V25,
67 .acq_time = adcAcqTime8
68 }
69};
70
71#define ADC_DEV_NUMOF ARRAY_SIZE(adc_config)
72#define ADC_NUMOF ARRAY_SIZE(adc_channel_config)
74
79static const dac_conf_t dac_config[] = {
80 {
81 .dev = DAC0,
82 .ref = dacRefVDD,
83 .cmu = cmuClock_DAC0,
84 }
85};
86
87static const dac_chan_conf_t dac_channel_config[] = {
88 {
89 .dev = 0,
90 .index = 1,
91 }
92};
93
94#define DAC_DEV_NUMOF ARRAY_SIZE(dac_config)
95#define DAC_NUMOF ARRAY_SIZE(dac_channel_config)
97
102static const i2c_conf_t i2c_config[] = {
103 {
104 .dev = I2C1,
105 .sda_pin = GPIO_PIN(PE, 0),
106 .scl_pin = GPIO_PIN(PE, 1),
107 .loc = I2C_ROUTE_LOCATION_LOC2,
108 .speed = I2C_SPEED_NORMAL,
109 .cmu = cmuClock_I2C1,
110 .irq = I2C1_IRQn,
111 .use_internal_pull_ups = true
112 }
113};
114
115#define I2C_NUMOF ARRAY_SIZE(i2c_config)
116#define I2C_0_ISR isr_i2c1
118
123static const pwm_chan_conf_t pwm_channel_config[] = {
124 {
125 .index = 0,
126 .pin = GPIO_PIN(PF, 6),
127 .loc = TIMER_ROUTE_LOCATION_LOC2
128 },
129 {
130 .index = 1,
131 .pin = GPIO_PIN(PF, 7),
132 .loc = TIMER_ROUTE_LOCATION_LOC2
133 }
134};
135
136static const pwm_conf_t pwm_config[] = {
137 {
138 .dev = TIMER0,
139 .cmu = cmuClock_TIMER0,
140 .irq = TIMER0_IRQn,
141 .channels = 2,
142 .channel = pwm_channel_config
143 }
144};
145
146#define PWM_DEV_NUMOF ARRAY_SIZE(pwm_config)
147#define PWM_NUMOF ARRAY_SIZE(pwm_channel_config)
149
154#ifndef RTT_FREQUENCY
155#define RTT_FREQUENCY (1U) /* in Hz */
156#endif
158
163static const spi_dev_t spi_config[] = {
164 {
165 .dev = USART1,
166 .mosi_pin = GPIO_PIN(PD, 0),
167 .miso_pin = GPIO_PIN(PD, 1),
168 .clk_pin = GPIO_PIN(PD, 2),
169 .loc = USART_ROUTE_LOCATION_LOC1,
170 .cmu = cmuClock_USART1,
171 .irq = USART1_RX_IRQn
172 }
173};
174
175#define SPI_NUMOF ARRAY_SIZE(spi_config)
177
184static const timer_conf_t timer_config[] = {
185 {
186 .prescaler = {
187 .dev = TIMER1,
188 .cmu = cmuClock_TIMER1
189 },
190 .timer = {
191 .dev = TIMER2,
192 .cmu = cmuClock_TIMER2
193 },
194 .irq = TIMER2_IRQn,
195 .channel_numof = 3
196 },
197 {
198 .prescaler = {
199 .dev = NULL,
200 .cmu = cmuClock_LETIMER0
201 },
202 .timer = {
203 .dev = LETIMER0,
204 .cmu = cmuClock_LETIMER0
205 },
206 .irq = LETIMER0_IRQn,
207 .channel_numof = 2
208 }
209};
210
211#define TIMER_NUMOF ARRAY_SIZE(timer_config)
212#define TIMER_0_ISR isr_timer2
213#define TIMER_1_ISR isr_letimer0
215
220static const uart_conf_t uart_config[] = {
221 {
222 .dev = USART2,
223 .rx_pin = GPIO_PIN(PB, 4),
224 .tx_pin = GPIO_PIN(PB, 3),
225 .loc = USART_ROUTE_LOCATION_LOC1,
226 .cmu = cmuClock_USART2,
227 .irq = USART2_RX_IRQn
228 },
229 {
230 .dev = LEUART0,
231 .rx_pin = GPIO_PIN(PD, 5),
232 .tx_pin = GPIO_PIN(PD, 4),
233 .loc = LEUART_ROUTE_LOCATION_LOC0,
234 .cmu = cmuClock_LEUART0,
235 .irq = LEUART0_IRQn
236 }
237};
238
239#define UART_NUMOF ARRAY_SIZE(uart_config)
240#define UART_0_ISR_RX isr_usart2_rx
241#define UART_1_ISR_RX isr_leuart0
243
244#ifdef __cplusplus
245}
246#endif
247
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:42
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:274
@ PB
port B
@ PD
port D
ADC channel configuration.
Definition periph_cpu.h:382
ADC device configuration.
Definition periph_cpu.h:374
DAC line configuration data.
Definition periph_cpu.h:297
I2C configuration structure.
Definition periph_cpu.h:295
PWM channel configuration.
Definition periph_cpu.h:465
PWM device configuration.
SPI device configuration.
Definition periph_cpu.h:514
Timer device configuration.
Definition periph_cpu.h:260
UART device configuration.
Definition periph_cpu.h:214