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periph_conf.h
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1/*
2 * Copyright (C) 2015-2020 Freie Universität Berlin
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
20#ifndef PERIPH_CONF_H
21#define PERIPH_CONF_H
22
23#include "cpu.h"
24#include "periph_cpu.h"
25#include "em_cmu.h"
26
27#ifdef __cplusplus
28extern "C" {
29#endif
30
35#ifndef CLOCK_HF
36#define CLOCK_HF cmuSelect_HFXO
37#endif
38#ifndef CLOCK_CORE_DIV
39#define CLOCK_CORE_DIV cmuClkDiv_1
40#endif
41#ifndef CLOCK_LFA
42#define CLOCK_LFA cmuSelect_LFXO
43#endif
44#ifndef CLOCK_LFB
45#define CLOCK_LFB cmuSelect_LFXO
46#endif
53static const adc_conf_t adc_config[] = {
54 {
55 .dev = ADC0,
56 .cmu = cmuClock_ADC0,
57 }
58};
59
60static const adc_chan_conf_t adc_channel_config[] = {
61 {
62 .dev = 0,
63 .input = adcSingleInputTemp,
64 .reference = adcRef1V25,
65 .acq_time = adcAcqTime8
66 },
67 {
68 .dev = 0,
69 .input = adcSingleInputVDDDiv3,
70 .reference = adcRef1V25,
71 .acq_time = adcAcqTime8
72 }
73};
74
75#define ADC_DEV_NUMOF ARRAY_SIZE(adc_config)
76#define ADC_NUMOF ARRAY_SIZE(adc_channel_config)
83static const dac_conf_t dac_config[] = {
84 {
85 .dev = DAC0,
86 .ref = dacRefVDD,
87 .cmu = cmuClock_DAC0,
88 }
89};
90
91static const dac_chan_conf_t dac_channel_config[] = {
92 {
93 .dev = 0,
94 .index = 1,
95 }
96};
97
98#define DAC_DEV_NUMOF ARRAY_SIZE(dac_config)
99#define DAC_NUMOF ARRAY_SIZE(dac_channel_config)
106static const i2c_conf_t i2c_config[] = {
107 {
108 .dev = I2C1,
109 .sda_pin = GPIO_PIN(PE, 0),
110 .scl_pin = GPIO_PIN(PE, 1),
111 .loc = I2C_ROUTE_LOCATION_LOC2,
112 .cmu = cmuClock_I2C1,
113 .irq = I2C1_IRQn,
114 .speed = I2C_SPEED_NORMAL
115 }
116};
117
118#define I2C_NUMOF ARRAY_SIZE(i2c_config)
119#define I2C_0_ISR isr_i2c1
126static const pwm_chan_conf_t pwm_channel_config[] = {
127 {
128 .index = 0,
129 .pin = GPIO_PIN(PF, 6),
130 .loc = TIMER_ROUTE_LOCATION_LOC2
131 },
132 {
133 .index = 1,
134 .pin = GPIO_PIN(PF, 7),
135 .loc = TIMER_ROUTE_LOCATION_LOC2
136 }
137};
138
139static const pwm_conf_t pwm_config[] = {
140 {
141 .dev = TIMER0,
142 .cmu = cmuClock_TIMER0,
143 .irq = TIMER0_IRQn,
144 .channels = 2,
145 .channel = pwm_channel_config
146 }
147};
148
149#define PWM_DEV_NUMOF ARRAY_SIZE(pwm_config)
150#define PWM_NUMOF ARRAY_SIZE(pwm_channel_config)
157#ifndef RTT_FREQUENCY
158#define RTT_FREQUENCY (1U) /* in Hz */
159#endif
166static const spi_dev_t spi_config[] = {
167 {
168 .dev = USART1,
169 .mosi_pin = GPIO_PIN(PD, 0),
170 .miso_pin = GPIO_PIN(PD, 1),
171 .clk_pin = GPIO_PIN(PD, 2),
172 .loc = USART_ROUTE_LOCATION_LOC1,
173 .cmu = cmuClock_USART1,
174 .irq = USART1_RX_IRQn
175 }
176};
177
178#define SPI_NUMOF ARRAY_SIZE(spi_config)
187static const timer_conf_t timer_config[] = {
188 {
189 .prescaler = {
190 .dev = TIMER1,
191 .cmu = cmuClock_TIMER1
192 },
193 .timer = {
194 .dev = TIMER2,
195 .cmu = cmuClock_TIMER2
196 },
197 .irq = TIMER2_IRQn,
198 .channel_numof = 3
199 },
200 {
201 .prescaler = {
202 .dev = NULL,
203 .cmu = cmuClock_LETIMER0
204 },
205 .timer = {
206 .dev = LETIMER0,
207 .cmu = cmuClock_LETIMER0
208 },
209 .irq = LETIMER0_IRQn,
210 .channel_numof = 2
211 }
212};
213
214#define TIMER_NUMOF ARRAY_SIZE(timer_config)
215#define TIMER_0_ISR isr_timer2
216#define TIMER_1_ISR isr_letimer0
223static const uart_conf_t uart_config[] = {
224 {
225 .dev = USART2,
226 .rx_pin = GPIO_PIN(PB, 4),
227 .tx_pin = GPIO_PIN(PB, 3),
228 .loc = USART_ROUTE_LOCATION_LOC1,
229 .cmu = cmuClock_USART2,
230 .irq = USART2_RX_IRQn
231 },
232 {
233 .dev = LEUART0,
234 .rx_pin = GPIO_PIN(PD, 5),
235 .tx_pin = GPIO_PIN(PD, 4),
236 .loc = LEUART_ROUTE_LOCATION_LOC0,
237 .cmu = cmuClock_LEUART0,
238 .irq = LEUART0_IRQn
239 }
240};
241
242#define UART_NUMOF ARRAY_SIZE(uart_config)
243#define UART_0_ISR_RX isr_usart2_rx
244#define UART_1_ISR_RX isr_leuart0
247#ifdef __cplusplus
248}
249#endif
250
251#endif /* PERIPH_CONF_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:278
@ PB
port B
@ PD
port D
ADC channel configuration.
Definition periph_cpu.h:387
uint8_t dev
device index
Definition periph_cpu.h:388
ADC device configuration.
Definition periph_cpu.h:379
ADC_TypeDef * dev
ADC device used.
Definition periph_cpu.h:380
DAC line configuration data.
Definition periph_cpu.h:301
I2C configuration structure.
Definition periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition periph_cpu.h:300
PWM channel configuration.
Definition periph_cpu.h:469
uint8_t index
TIMER channel to use.
Definition periph_cpu.h:470
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition periph_cpu.h:518
USART_TypeDef * dev
USART device used.
Definition periph_cpu.h:519
Timer device configuration.
Definition periph_cpu.h:264
timer_dev_t prescaler
the lower neighboring timer (not initialized for LETIMER)
Definition periph_cpu.h:557
void * dev
TIMER_TypeDef or LETIMER_TypeDef device used.
Definition periph_cpu.h:550
UART device configuration.
Definition periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:219