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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2022 SSV Software Systems GmbH
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
17
18#include <stdint.h>
19
20#include "cpu.h"
21#include "periph_cpu.h"
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
31#define HFXO_FREQ (39000000UL)
32#define CMU_HFXOINIT CMU_HFXOINIT_DEFAULT
33
34#define LFXO_FREQ (32768UL)
35#define CMU_LFXOINIT CMU_LFXOINIT_DEFAULT
36
37static const clk_mux_t clk_mux_config[] = {
38 { .clk = cmuClock_SYSCLK, .src = cmuSelect_HFXO },
39 { .clk = cmuClock_EM01GRPACLK, .src = cmuSelect_HFXO },
40 { .clk = cmuClock_EM01GRPCCLK, .src = cmuSelect_HFXO },
41 { .clk = cmuClock_EM23GRPACLK, .src = cmuSelect_LFXO },
42 { .clk = cmuClock_EUSART0CLK, .src = cmuSelect_HFXO },
43};
44#define CLK_MUX_NUMOF ARRAY_SIZE(clk_mux_config)
45
46static const clk_div_t clk_div_config[] = {
47 { .clk = cmuClock_HCLK, .div = 1 },
48 { .clk = cmuClock_PCLK, .div = 1 },
49 { .clk = cmuClock_LSPCLK, .div = 2 },
50};
51#define CLK_DIV_NUMOF ARRAY_SIZE(clk_div_config)
53
58static const adc_conf_t adc_config[] = {
59 {
60 .dev = IADC0,
61 .cmu = cmuClock_IADC0,
62 .reference = iadcCfgReferenceInt1V2,
63 .reference_mV = 1210,
64 .gain = iadcCfgAnalogGain0P5x,
65 .available_res = { ADC_RES_10BIT, ADC_RES_16BIT }
66 }
67};
68
69static const adc_chan_conf_t adc_channel_config[] = {
70 {
71 .dev = 0,
72 .input_pos = GPIO_PIN(PA, 10),
73 .input_neg = GPIO_UNDEF
74 },
75 {
76 .dev = 0,
77 .input_pos = GPIO_PIN(PA, 0),
78 .input_neg = GPIO_PIN(PA, 5)
79 },
80};
81
82#define ADC_DEV_NUMOF ARRAY_SIZE(adc_config)
83#define ADC_NUMOF ARRAY_SIZE(adc_channel_config)
85
90static const i2c_conf_t i2c_config[] = {
91 {
92 .dev = I2C0,
93 .sda_pin = GPIO_PIN(PC, 7),
94 .scl_pin = GPIO_PIN(PC, 5),
95 .speed = I2C_SPEED_NORMAL,
96 .cmu = cmuClock_I2C0,
97 .irq = I2C0_IRQn,
98 .use_internal_pull_ups = true
99 }
100};
101
102#define I2C_NUMOF ARRAY_SIZE(i2c_config)
103#define I2C_0_ISR isr_i2c0
105
110static const spi_dev_t spi_config[] = {
111 {
112 .dev = USART0,
113 .mosi_pin = GPIO_PIN(PC, 1),
114 .miso_pin = GPIO_PIN(PC, 2),
115 .clk_pin = GPIO_PIN(PC, 3),
116 .cmu = cmuClock_USART0,
117 .irq = USART0_RX_IRQn
118 }
119};
120
121#define SPI_NUMOF ARRAY_SIZE(spi_config)
123
131static const timer_conf_t timer_config[] = {
132 {
133 .dev = TIMER0,
134 .cmu = cmuClock_TIMER0,
135 .irq = TIMER0_IRQn
136 },
137 {
138 .dev = LETIMER0,
139 .cmu = cmuClock_LETIMER0,
140 .irq = LETIMER0_IRQn
141 }
142};
143
144#define TIMER_0_ISR isr_timer0
145#define TIMER_1_ISR isr_letimer0
146
147#define TIMER_0_MAX_VALUE TIMER_MAX_VALUE
148#define TIMER_1_MAX_VALUE LETIMER_MAX_VALUE
149
150#define TIMER_NUMOF ARRAY_SIZE(timer_config)
152
157static const uart_conf_t uart_config[] = {
158 {
159 .dev = EUSART1,
160 .rx_pin = GPIO_PIN(PA, 9),
161 .tx_pin = GPIO_PIN(PA, 8),
162 .cmu = cmuClock_EUSART1,
163 .irq = EUSART1_RX_IRQn
164 }
165};
166#define UART_0_ISR_RX isr_eusart1_rx
167
168#define UART_NUMOF ARRAY_SIZE(uart_config)
170
171#ifdef __cplusplus
172}
173#endif
174
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:42
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:274
@ ADC_RES_16BIT
ADC resolution: 16 bit.
Definition adc.h:98
@ ADC_RES_10BIT
ADC resolution: 10 bit.
Definition adc.h:95
@ PC
port C
@ PA
port A
ADC channel configuration.
Definition periph_cpu.h:382
ADC device configuration.
Definition periph_cpu.h:374
Clock divider configuration.
Definition periph_cpu.h:58
Clock mux configuration.
Definition periph_cpu.h:50
I2C configuration structure.
Definition periph_cpu.h:295
SPI device configuration.
Definition periph_cpu.h:514
Timer device configuration.
Definition periph_cpu.h:260
UART device configuration.
Definition periph_cpu.h:214