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cc2538_gpio.h
Go to the documentation of this file.
1/*
2 * Copyright (C) 2014 Loci Controls Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
24#ifndef CC2538_GPIO_H
25#define CC2538_GPIO_H
26
27#include <stdint.h>
28
29#include "cc2538.h"
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
39enum {
40 PORT_A = 0,
41 PORT_B = 1,
42 PORT_C = 2,
43 PORT_D = 3,
44};
47#define GPIO_PORT_SHIFT 3
48#define GPIO_BITS_PER_PORT ( 1 << GPIO_PORT_SHIFT )
49#define GPIO_BIT_MASK ( GPIO_BITS_PER_PORT - 1 )
58#define PIN_MASK(n) ( 1 << (n) )
59
67#define GPIO_NUM_TO_PORT_NUM(gpio_num) ( (gpio_num) >> GPIO_PORT_SHIFT )
68
76#define GPIO_BIT_NUM(gpio_num) ( (gpio_num) & GPIO_BIT_MASK )
77
86#define GPIO_PXX_TO_NUM(port_num, bit_num) ( ((port_num) << GPIO_PORT_SHIFT) | (bit_num) )
87
95#define GPIO_NUM_TO_DEV(gpio_num) ( GPIO_A + GPIO_NUM_TO_PORT_NUM(gpio_num) )
96
102#define gpio_hardware_control(gpio_num) ( GPIO_NUM_TO_DEV(gpio_num)->AFSEL |= PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
103
109#define gpio_software_control(gpio_num) ( GPIO_NUM_TO_DEV(gpio_num)->AFSEL &= ~PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
110
116#define gpio_dir_output(gpio_num) ( GPIO_NUM_TO_DEV(gpio_num)->DIR |= PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
117
123#define gpio_dir_input(gpio_num) ( GPIO_NUM_TO_DEV(gpio_num)->DIR &= ~PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
124
130#define cc2538_gpio_read(gpio_num) ( (GPIO_NUM_TO_DEV(gpio_num)->DATA >> GPIO_BIT_NUM(gpio_num)) & 1 )
131
137#define cc2538_gpio_clear(gpio_num) ( GPIO_NUM_TO_DEV(gpio_num)->DATA &= ~PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
138
145enum {
178};
210
214#define GPIO_BASE (0x400d9000)
215
220#define GPIO_PORTNUM_SHIFT (12U)
221#define GPIO_PORTNUM_MASK (0x00007000)
222#define GPIO_PIN_MASK (0x00000007)
223#define GPIO_PORT_MASK (0xfffff000)
231#define GPIO_A ((cc2538_gpio_t *)0x400d9000)
232#define GPIO_B ((cc2538_gpio_t *)0x400da000)
233#define GPIO_C ((cc2538_gpio_t *)0x400db000)
234#define GPIO_D ((cc2538_gpio_t *)0x400dc000)
240 typedef struct {
241 cc2538_reg_t SEL[32];
242 cc2538_reg_t OVER[32];
243 cc2538_reg_t PINS[21];
244 } cc2538_ioc_t;
245
307 typedef enum {
308 OVERRIDE_DISABLE = 0x0,
309 OVERRIDE_ANALOG = 0x1,
310 OVERRIDE_PULLDOWN = 0x2,
311 OVERRIDE_PULLUP = 0x4,
312 OVERRIDE_ENABLE = 0x8,
314
321#define IOC_OVERRIDE_OE 0x00000008
322#define IOC_OVERRIDE_PUE 0x00000004
323#define IOC_OVERRIDE_PDE 0x00000002
324#define IOC_OVERRIDE_ANA 0x00000001
325#define IOC_OVERRIDE_DIS 0x00000000
331#define IOC ((cc2538_ioc_t *)0x400d4000)
332
339#define IOC_PXX_OVER (IOC->OVER)
340#define IOC_PXX_SEL (IOC->SEL)
343#ifdef __cplusplus
344} /* end extern "C" */
345#endif
346
347#endif /* CC2538_GPIO_H */
348
@ PORT_B
port B
Definition periph_cpu.h:48
@ PORT_C
port C
Definition periph_cpu.h:49
@ PORT_A
port A
Definition periph_cpu.h:47
@ PORT_D
port D
Definition periph_cpu.h:50
CC2538 MCU interrupt and register definitions.
volatile uint32_t cc2538_reg_t
Least-significant 32 bits of the IEEE address.
Definition cc2538.h:124
cc2538_ioc_pin_t
#define GPIO_PXX_TO_NUM(port_num, bit_num)
Generate a GPIO number given a port and bit number.
Definition cc2538_gpio.h:86
cc2538_ioc_over_t
Values to override pin configuration.
cc2538_ioc_sel_t
@ GPIO_PB1
PB1.
@ GPIO_PD2
PD2.
@ GPIO_PA3
PA3.
@ GPIO_PB4
PB4.
@ GPIO_PC1
PC1.
@ GPIO_PC7
PC7.
@ GPIO_PD3
PD3.
@ GPIO_PC3
PC3.
@ GPIO_PA4
PA4.
@ GPIO_PC2
PC2.
@ GPIO_PB6
PB6.
@ GPIO_PB3
PB3.
@ GPIO_PA5
PA5.
@ GPIO_PB7
PB7.
@ GPIO_PD1
PD1.
@ GPIO_PD7
PD7.
@ GPIO_PA2
PA2.
@ GPIO_PA7
PA7.
@ GPIO_PA6
PA6.
@ GPIO_PD5
PD5.
@ GPIO_PC6
PC6.
@ GPIO_PA1
PA1.
@ GPIO_PB0
PB0.
@ GPIO_PD4
PD4.
@ GPIO_PB5
PB5.
@ GPIO_PB2
PB2.
@ GPIO_PD0
PD0.
@ GPIO_PD6
PD6.
@ GPIO_PC5
PC5.
@ GPIO_PC0
PC0.
@ GPIO_PC4
PC4.
@ GPIO_PA0
PA0.
@ GPT3_OCP1
GPT3 OCP1.
@ UART1_RXD
UART1 RXD.
@ GPT2_OCP2
GPT2 OCP2.
@ GPT0_OCP1
GPT0 OCP1.
@ SSI0_FSS_IN
SSI0 FSS IN.
@ SSI0_RXD
SSI0 RXD.
@ SSI0_CLK_IN
SSI0 CLK IN.
@ SSI1_RXD
SSI1 RXD.
@ GPT3_OCP2
GPT3 OCP2.
@ I2C_SCL_IN
I2C SCL IN.
@ GPT1_OCP1
GPT1 OCP1.
@ GPT2_OCP1
GPT2 OCP1.
@ UART1_CTS
UART1 CTS.
@ I2C_SDA_IN
I2C SDA IN.
@ SSI0_CLK
SSI0 CLK.
@ UART0_RXD
UART0 RXD.
@ GPT0_OCP2
GPT0 OCP2.
@ GPT1_OCP2
GPT1 OCP2.
@ SSI1_CLK
SSI1 CLK.
@ SSI1_FSS_IN
SSI1 FSS IN.
@ SSI1_CLK_IN
SSI1 CLK IN.
@ SSI1_TX_SER
SSI1 STXSER EN.
@ GPT3_ICP2
GPT3 ICP2.
@ SSI1_TXD
SSI1 TXD.
@ GPT0_ICP1
GPT0 ICP1.
@ SSI0_TX_SER
SSI0 STXSER EN.
@ SSI1_CLK_OUT
SSI1 CLKOUT.
@ SSI0_FSS_OUT
SSI0 FSSOUT.
@ GPT3_ICP1
GPT3 ICP1.
@ UART1_RTS
UART1 RTS.
@ GPT0_ICP2
GPT0 ICP2.
@ SSI1_FSS_OUT
SSI1 FSSOUT.
@ GPT2_ICP1
GPT2 ICP1.
@ GPT1_ICP2
GPT1 ICP2.
@ UART0_TXD
UART0 TXD.
@ I2C_SDA_OUT
I2C CMSSDA.
@ GPT2_ICP2
GPT2 ICP2.
@ GPT1_ICP1
GPT1 ICP1.
@ UART1_TXD
UART1 TXD.
@ SSI0_TXD
SSI0 TXD.
@ SSI0_CLK_OUT
SSI0 CLKOUT.
@ I2C_SCL_OUT
I2C CMSSCL.
GPIO port component registers.
cc2538_reg_t AFSEL
GPIO_A Alternate Function / mode control select register.
cc2538_reg_t DATA
GPIO_A Data Register.
cc2538_reg_t IRQ_DETECT_UNMASK
GPIO_A IRQ Detect ACK for masked interrupts.
cc2538_reg_t DIR
GPIO_A data direction register.
cc2538_reg_t USB_IRQ_ACK
GPIO_A IRQ Detect ACK for USB.
cc2538_reg_t PI_IEN
GPIO_A The Power-up Interrupt Enable register.
cc2538_reg_t GPIOLOCK
GPIO_A Lock register.
cc2538_reg_t IBE
GPIO_A Interrupt Both-Edges register.
cc2538_reg_t RIS
GPIO_A Raw Interrupt Status register.
cc2538_reg_t IS
GPIO_A Interrupt Sense register.
cc2538_reg_t IC
GPIO_A Interrupt Clear register.
cc2538_reg_t PMUX
GPIO_A The PMUX register.
cc2538_reg_t IRQ_DETECT_ACK
GPIO_A IRQ Detect ACK register.
cc2538_reg_t MIS
GPIO_A Masked Interrupt Status register.
cc2538_reg_t GPIOCR
GPIO_A Commit Register.
cc2538_reg_t IEV
GPIO_A Interrupt Event Register.
cc2538_reg_t P_EDGE_CTRL
GPIO_A The Port Edge Control register.
cc2538_reg_t IE
GPIO_A Interrupt mask register.
IOC port component registers.