Functions to communicate with the NRF24L01+ (NG) transceiver via SPI. More...
Functions to communicate with the NRF24L01+ (NG) transceiver via SPI.
Definition in file nrf24l01p_ng_communication.h.
#include "nrf24l01p_ng.h"
Go to the source code of this file.
#define | NRF24L01P_NG_ADDR_MASK (0x1F) |
Mask for 5 bit register address. | |
#define | NRF24L01P_NG_PIPE_MASK (0x07) |
Mask for 3 bit pipe number. | |
#define | NRF24L01P_NG_CMD_R_REGISTER(reg) (0x00 | ((reg) & NRF24L01P_NG_ADDR_MASK)) |
Read register value (1 to 5 bytes) | |
#define | NRF24L01P_NG_CMD_W_REGISTER(reg) (0x20 | ((reg) & NRF24L01P_NG_ADDR_MASK)) |
Write register value (1 to 5 bytes) | |
#define | NRF24L01P_NG_CMD_R_RX_PAYLOAD (0x61) |
Read RX payload buffer (1 to 32 bytes) | |
#define | NRF24L01P_NG_CMD_W_TX_PAYLOAD (0xA0) |
Write TX payload buffer (1 to 32 bytes) | |
#define | NRF24L01P_NG_CMD_FLUSH_TX (0xE1) |
Flush TX buffer (0 bytes data) | |
#define | NRF24L01P_NG_CMD_FLUSH_RX (0xE2) |
Flush RX buffer (0 bytes data) | |
#define | NRF24L01P_NG_CMD_REUSE_TX_PL (0xE3) |
Reuse last transmitted payload (0 bytes data) | |
#define | NRF24L01P_NG_CMD_R_RX_PL_WID (0x60) |
Read RX payload width for the top R_RX_PAYLOAD in RX FIFO (1 byte data) | |
#define | NRF24L01P_NG_CMD_W_ACK_PAYLOAD(pipe) (0xA8 | ((pipe) & NRF24L01P_NG_PIPE_MASK)) |
Write payload to be transmitted together with ACK for certain pipe (1 to 32 bytes data) | |
#define | NRF24L01P_NG_CMD_W_TX_PAYLOAD_NO_ACK (0xB0) |
Disable auto ACK on this specific frame. | |
#define | NRF24L01P_NG_CMD_NOP (0xFF) |
No operation. | |
void | nrf24l01p_ng_acquire (nrf24l01p_ng_t *dev) |
Acquire the SPI bus of the transceiver. | |
void | nrf24l01p_ng_release (nrf24l01p_ng_t *dev) |
Release the SPI bus of the transceiver. | |
uint8_t | nrf24l01p_ng_read_reg (const nrf24l01p_ng_t *dev, uint8_t reg, uint8_t *dest, size_t len) |
Read a register value. | |
uint8_t | nrf24l01p_ng_write_reg (const nrf24l01p_ng_t *dev, uint8_t reg, const uint8_t *src, size_t len) |
Write a register value. | |
uint8_t | nrf24l01p_ng_read_rx_payload (const nrf24l01p_ng_t *dev, void *dest, size_t len) |
Read received payload. | |
uint8_t | nrf24l01p_ng_write_tx_payload (const nrf24l01p_ng_t *dev, const void *src, size_t len) |
Write payload to be transmitted. | |
uint8_t | nrf24l01p_ng_flush_tx (const nrf24l01p_ng_t *dev) |
Flush TX FIFO. | |
uint8_t | nrf24l01p_ng_flush_rx (const nrf24l01p_ng_t *dev) |
Flush RX FIFO. | |
uint8_t | nrf24l01p_ng_reuse_tx_pl (const nrf24l01p_ng_t *dev) |
Reuse TX payload in FIFO. | |
uint8_t | nrf24l01p_ng_read_rx_pl_width (const nrf24l01p_ng_t *dev, uint8_t *dest) |
Read received payload width. | |
uint8_t | nrf24l01p_ng_write_ack_pl (const nrf24l01p_ng_t *dev, const void *src, size_t len, uint8_t pipe) |
Write Payload to be transmitted in an ACK frame. | |
uint8_t | nrf24l01p_ng_write_tx_pl_no_ack (const nrf24l01p_ng_t *dev, const void *src, size_t len) |
Write payload to be transmitted but do not expect an ACK for this frame. | |
uint8_t | nrf24l01p_ng_get_status (const nrf24l01p_ng_t *dev) |
Get status register value. | |
#define NRF24L01P_NG_ADDR_MASK (0x1F) |
Mask for 5 bit register address.
Definition at line 30 of file nrf24l01p_ng_communication.h.
#define NRF24L01P_NG_CMD_FLUSH_RX (0xE2) |
Flush RX buffer (0 bytes data)
Definition at line 73 of file nrf24l01p_ng_communication.h.
#define NRF24L01P_NG_CMD_FLUSH_TX (0xE1) |
Flush TX buffer (0 bytes data)
Definition at line 67 of file nrf24l01p_ng_communication.h.
#define NRF24L01P_NG_CMD_NOP (0xFF) |
No operation.
Definition at line 102 of file nrf24l01p_ng_communication.h.
#define NRF24L01P_NG_CMD_R_REGISTER | ( | reg | ) | (0x00 | ((reg) & NRF24L01P_NG_ADDR_MASK)) |
Read register value (1 to 5 bytes)
Definition at line 41 of file nrf24l01p_ng_communication.h.
#define NRF24L01P_NG_CMD_R_RX_PAYLOAD (0x61) |
Read RX payload buffer (1 to 32 bytes)
Definition at line 55 of file nrf24l01p_ng_communication.h.
#define NRF24L01P_NG_CMD_R_RX_PL_WID (0x60) |
Read RX payload width for the top R_RX_PAYLOAD in RX FIFO (1 byte data)
Definition at line 85 of file nrf24l01p_ng_communication.h.
#define NRF24L01P_NG_CMD_REUSE_TX_PL (0xE3) |
Reuse last transmitted payload (0 bytes data)
Definition at line 79 of file nrf24l01p_ng_communication.h.
#define NRF24L01P_NG_CMD_W_ACK_PAYLOAD | ( | pipe | ) | (0xA8 | ((pipe) & NRF24L01P_NG_PIPE_MASK)) |
Write payload to be transmitted together with ACK for certain pipe (1 to 32 bytes data)
Definition at line 91 of file nrf24l01p_ng_communication.h.
#define NRF24L01P_NG_CMD_W_REGISTER | ( | reg | ) | (0x20 | ((reg) & NRF24L01P_NG_ADDR_MASK)) |
Write register value (1 to 5 bytes)
Definition at line 48 of file nrf24l01p_ng_communication.h.
#define NRF24L01P_NG_CMD_W_TX_PAYLOAD (0xA0) |
Write TX payload buffer (1 to 32 bytes)
Definition at line 61 of file nrf24l01p_ng_communication.h.
#define NRF24L01P_NG_CMD_W_TX_PAYLOAD_NO_ACK (0xB0) |
Disable auto ACK on this specific frame.
Definition at line 97 of file nrf24l01p_ng_communication.h.
#define NRF24L01P_NG_PIPE_MASK (0x07) |
Mask for 3 bit pipe number.
Definition at line 35 of file nrf24l01p_ng_communication.h.
void nrf24l01p_ng_acquire | ( | nrf24l01p_ng_t * | dev | ) |
Acquire the SPI bus of the transceiver.
[in] | dev | NRF24L01+ device handle |
uint8_t nrf24l01p_ng_flush_rx | ( | const nrf24l01p_ng_t * | dev | ) |
Flush RX FIFO.
[in] | dev | NRF24L01+ device handle |
uint8_t nrf24l01p_ng_flush_tx | ( | const nrf24l01p_ng_t * | dev | ) |
Flush TX FIFO.
[in] | dev | NRF24L01+ device handle |
uint8_t nrf24l01p_ng_get_status | ( | const nrf24l01p_ng_t * | dev | ) |
Get status register value.
[in] | dev | NRF24L01+ device handle |
uint8_t nrf24l01p_ng_read_reg | ( | const nrf24l01p_ng_t * | dev, |
uint8_t | reg, | ||
uint8_t * | dest, | ||
size_t | len | ||
) |
Read a register value.
[in] | dev | NRF24L01+ device handle |
[in] | reg | Register address |
[out] | dest | Output register |
[in] | len | Output register width |
uint8_t nrf24l01p_ng_read_rx_payload | ( | const nrf24l01p_ng_t * | dev, |
void * | dest, | ||
size_t | len | ||
) |
Read received payload.
[in] | dev | NRF24L01+ device handle |
[out] | dest | Output payload buffer |
[in] | len | Output payload length |
uint8_t nrf24l01p_ng_read_rx_pl_width | ( | const nrf24l01p_ng_t * | dev, |
uint8_t * | dest | ||
) |
Read received payload width.
[in] | dev | NRF24L01+ device handle |
[out] | dest | Payload width |
void nrf24l01p_ng_release | ( | nrf24l01p_ng_t * | dev | ) |
Release the SPI bus of the transceiver.
[in] | dev | NRF24L01+ device handle |
uint8_t nrf24l01p_ng_reuse_tx_pl | ( | const nrf24l01p_ng_t * | dev | ) |
Reuse TX payload in FIFO.
This function can be used to reattempt to transmit a frame, after a MAX_RT interrupt was triggered.
[in] | dev | NRF24L01+ device handle |
uint8_t nrf24l01p_ng_write_ack_pl | ( | const nrf24l01p_ng_t * | dev, |
const void * | src, | ||
size_t | len, | ||
uint8_t | pipe | ||
) |
Write Payload to be transmitted in an ACK frame.
[in] | dev | NRF24L01+ device handle |
[in] | src | Input payload buffer |
[in] | len | Input payload length |
[in] | pipe | Index of data pipe |
uint8_t nrf24l01p_ng_write_reg | ( | const nrf24l01p_ng_t * | dev, |
uint8_t | reg, | ||
const uint8_t * | src, | ||
size_t | len | ||
) |
Write a register value.
[in] | dev | NRF24L01+ device handle |
[in] | reg | Register address |
[in] | src | Data to be written into the register |
[in] | len | Register width |
uint8_t nrf24l01p_ng_write_tx_payload | ( | const nrf24l01p_ng_t * | dev, |
const void * | src, | ||
size_t | len | ||
) |
Write payload to be transmitted.
[in] | dev | NRF24L01+ device handle |
[in] | src | Input payload buffer |
[in] | len | Input payload length |
uint8_t nrf24l01p_ng_write_tx_pl_no_ack | ( | const nrf24l01p_ng_t * | dev, |
const void * | src, | ||
size_t | len | ||
) |
Write payload to be transmitted but do not expect an ACK for this frame.
[in] | dev | NRF24L01+ device handle |
[in] | src | Input payload buffer |
[in] | len | Input payload length |