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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2020 Benjamin Valentin
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
18
19/* This board provides a LSE */
20#ifndef CONFIG_BOARD_HAS_LSE
21#define CONFIG_BOARD_HAS_LSE 1
22#endif
23
24/* This board provides an HSE */
25#ifndef CONFIG_BOARD_HAS_HSE
26#define CONFIG_BOARD_HAS_HSE 1
27#endif
28
29#include "clk_conf.h"
30#include "cfg_i2c1_pb8_pb9.h"
31
32#ifdef __cplusplus
33extern "C" {
34#endif
35
40static const timer_conf_t timer_config[] = {
41 {
42 .dev = TIM1,
43 .max = 0x0000ffff,
44 .rcc_mask = RCC_APB2ENR_TIM1EN,
45 .bus = APB2,
46 .irqn = TIM1_CC_IRQn
47 },
48 {
49 .dev = TIM3,
50 .max = 0x0000ffff,
51 .rcc_mask = RCC_APB1ENR_TIM3EN,
52 .bus = APB1,
53 .irqn = TIM3_IRQn
54 },
55};
56
57#define TIMER_0_ISR (isr_tim1_cc)
58#define TIMER_1_ISR (isr_tim3)
59
60#define TIMER_NUMOF ARRAY_SIZE(timer_config)
62
67static const uart_conf_t uart_config[] = {
68 {
69 .dev = USART1,
70 .rcc_mask = RCC_APB2ENR_USART1EN,
71 .rx_pin = GPIO_PIN(PORT_A, 10),
72 .tx_pin = GPIO_PIN(PORT_A, 9),
73 .rx_af = GPIO_AF1,
74 .tx_af = GPIO_AF1,
75 .bus = APB2,
76 .irqn = USART1_IRQn
77 }
78};
79
80#define UART_0_ISR (isr_usart1)
81
82#define UART_NUMOF ARRAY_SIZE(uart_config)
84
89static const pwm_conf_t pwm_config[] = {
90 {
91 .dev = TIM3,
92 .rcc_mask = RCC_APB1ENR_TIM3EN,
93 .chan = { { .pin = GPIO_PIN(PORT_A, 6), .cc_chan = 0},
94 { .pin = GPIO_PIN(PORT_A, 7), .cc_chan = 1},
95 { .pin = GPIO_UNDEF, .cc_chan = 0},
96 { .pin = GPIO_UNDEF, .cc_chan = 0} },
97 .af = GPIO_AF1,
98 .bus = APB1
99 }
100};
101
102#define PWM_NUMOF ARRAY_SIZE(pwm_config)
104
109static const spi_conf_t spi_config[] = {
110 {
111 .dev = SPI1,
112 .mosi_pin = GPIO_PIN(PORT_A, 7),
113 .miso_pin = GPIO_PIN(PORT_A, 6),
114 .sclk_pin = GPIO_PIN(PORT_A, 5),
115 .cs_pin = GPIO_PIN(PORT_B, 1),
116 .mosi_af = GPIO_AF0,
117 .miso_af = GPIO_AF0,
118 .sclk_af = GPIO_AF0,
119 .cs_af = GPIO_AF0,
120 .rccmask = RCC_APB2ENR_SPI1EN,
121 .apbbus = APB2
122 },
123};
124
125#define SPI_NUMOF ARRAY_SIZE(spi_config)
127
132static const adc_conf_t adc_config[] = {
133 { GPIO_PIN(PORT_A, 0), 0 },
134 { GPIO_PIN(PORT_A, 1), 1 },
135 { GPIO_PIN(PORT_A, 2), 2 },
136 { GPIO_PIN(PORT_A, 3), 3 },
137 { GPIO_PIN(PORT_A, 4), 4 },
138 { GPIO_PIN(PORT_A, 5), 5 }
139};
140
141#define ADC_NUMOF ARRAY_SIZE(adc_config)
143
144#ifdef __cplusplus
145}
146#endif
147
@ PORT_B
port B
Definition periph_cpu.h:47
@ PORT_A
port A
Definition periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Common configuration for STM32 I2C.
@ GPIO_AF1
use alternate function 1
Definition cpu_gpio.h:102
@ GPIO_AF0
use alternate function 0
Definition cpu_gpio.h:101
@ APB1
Advanced Peripheral Bus 1.
Definition periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2.
Definition periph_cpu.h:79
ADC device configuration.
Definition periph_cpu.h:377
PWM device configuration.
SPI device configuration.
Definition periph_cpu.h:336
Timer device configuration.
Definition periph_cpu.h:263
UART device configuration.
Definition periph_cpu.h:217