Peripheral MCU configuration for the P-L496G-CELL02 board.  
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Peripheral MCU configuration for the P-L496G-CELL02 board. 
- Author
 - Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr 
 
Definition in file periph_conf.h.
#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_rtt_default.h"
#include "cfg_timer_tim2.h"
#include "cfg_usb_otg_fs.h"
 
Go to the source code of this file.
◆ CONFIG_BOARD_HAS_LSE
      
        
          | #define CONFIG_BOARD_HAS_LSE   1 | 
        
      
 
 
◆ I2C_0_ISR
      
        
          | #define I2C_0_ISR   isr_i2c1_er | 
        
      
 
 
◆ I2C_NUMOF
◆ SPI_NUMOF
◆ UART_0_ISR
      
        
          | #define UART_0_ISR   (isr_usart2) | 
        
      
 
 
◆ UART_1_ISR
◆ UART_2_ISR
      
        
          | #define UART_2_ISR   (isr_usart1) | 
        
      
 
 
◆ UART_NUMOF
◆ i2c_config
Initial value:= {
    {
        .dev            = I2C1,
        .rcc_mask       = RCC_APB1ENR1_I2C1EN,
        .rcc_sw_mask    = RCC_CCIPR_I2C1SEL_1,      
        .irqn           = I2C1_ER_IRQn
    },
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
 
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
 
@ GPIO_AF4
use alternate function 4
 
@ APB1
Advanced Peripheral Bus 1.
 
 
Definition at line 105 of file periph_conf.h.
 
 
◆ spi_config
Initial value:= {
    {
        .dev      = SPI1,
        .rccmask  = RCC_APB2ENR_SPI1EN,
    }
}
@ GPIO_AF5
use alternate function 5
 
#define SPI_CS_UNDEF
Define value for unused CS line.
 
@ APB2
Advanced Peripheral Bus 2.
 
 
Definition at line 129 of file periph_conf.h.
 
 
◆ uart_config