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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2021 Otto-von-Guericke-Universität Magdeburg
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
17
18#include <stdint.h>
19
20#include "kernel_defines.h"
21#include "cpu.h"
22#include "periph_cpu.h"
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28static const uart_conf_t uart_config[] = {
29 {
30 .dev = UART0,
31 .rx_pin = GPIO_PIN(0, 1),
32 .tx_pin = GPIO_PIN(0, 0),
33 .irqn = UART0_IRQ_IRQn
34 },
35 {
36 .dev = UART1,
37 .rx_pin = GPIO_PIN(0, 9),
38 .tx_pin = GPIO_PIN(0, 8),
39 .irqn = UART1_IRQ_IRQn
40 }
41};
42
43#define UART_0_ISR (isr_uart0)
44#define UART_1_ISR (isr_uart1)
45
46#define UART_NUMOF ARRAY_SIZE(uart_config)
47
48static const spi_conf_t spi_config[] = {
49 {
50 .dev = SPI0,
51 .miso_pin = GPIO_PIN(0, 4),
52 .mosi_pin = GPIO_PIN(0, 3),
53 .clk_pin = GPIO_PIN(0, 2)
54 },
55 {
56 .dev = SPI1,
57 .miso_pin = GPIO_PIN(0, 12),
58 .mosi_pin = GPIO_PIN(0, 11),
59 .clk_pin = GPIO_PIN(0, 10)
60 }
61};
62
63#define SPI_NUMOF ARRAY_SIZE(spi_config)
64
65static const timer_channel_conf_t timer0_channel_config[] = {
66 {
67 .irqn = TIMER_IRQ_0_IRQn
68 },
69 {
70 .irqn = TIMER_IRQ_1_IRQn
71 },
72 {
73 .irqn = TIMER_IRQ_2_IRQn
74 },
75 {
76 .irqn = TIMER_IRQ_3_IRQn
77 }
78};
79
80static const timer_conf_t timer_config[] = {
81 {
82 .dev = TIMER,
83 .ch = timer0_channel_config,
84 .ch_numof = ARRAY_SIZE(timer0_channel_config)
85 }
86};
87
88#define TIMER_0_ISRA isr_timer0
89#define TIMER_0_ISRB isr_timer1
90#define TIMER_0_ISRC isr_timer2
91#define TIMER_0_ISRD isr_timer3
92
93#define TIMER_NUMOF ARRAY_SIZE(timer_config)
94
101static const adc_conf_t adc_config[] = {
102 { .pin = GPIO_PIN(0, 26), .chan = 0},
103 { .pin = GPIO_PIN(0, 27), .chan = 1},
104 { .pin = GPIO_PIN(0, 28), .chan = 2},
105 };
106
107#define ADC_NUMOF ARRAY_SIZE(adc_config)
109
119#define I2C_NUMOF PIO_I2C_NUMOF
121
129static const pio_conf_t pio_config[] = {
130 {
131 .dev = PIO0,
132 .irqn0 = PIO0_IRQ_0_IRQn,
133 .irqn1 = PIO0_IRQ_1_IRQn
134 },
135 {
136 .dev = PIO1,
137 .irqn0 = PIO1_IRQ_0_IRQn,
138 .irqn1 = PIO1_IRQ_1_IRQn
139 }
140};
141
142#define PIO_0_ISR0 isr_pio00
143#define PIO_0_ISR1 isr_pio01
144#define PIO_1_ISR0 isr_pio10
145#define PIO_1_ISR1 isr_pio11
146
147#define PIO_NUMOF ARRAY_SIZE(pio_config)
148
156 {
157 .pio = 0,
158 .sda = GPIO_PIN(0, 4),
159 .scl = GPIO_PIN(0, 5),
160 .irq = 0,
161 },
162 {
163 .pio = 0,
164 .sda = GPIO_PIN(0, 6),
165 .scl = GPIO_PIN(0, 7),
166 .irq = 0,
167 },
168};
169
173#define PIO_I2C_NUMOF ARRAY_SIZE(pio_i2c_config)
175
180static const pwm_conf_t pwm_config[] = {
181 {
182 .pwm_slice = 4,
183 .chan = {
184 { .pin = GPIO_PIN(0, 25), .cc_chan = 1 }, /* rpi-pico onboard LED */
185 { .pin = GPIO_UNDEF, .cc_chan = 0 },
186 },
187 },
188};
189
190#define PWM_NUMOF ARRAY_SIZE(pwm_config)
192
193#ifdef __cplusplus
194}
195#endif
196
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:42
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const pio_conf_t pio_config[]
Array of PIO configurations.
static const pio_i2c_conf_t pio_i2c_config[]
PIO I2C configuration.
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition container.h:79
#define UART0
UART0 register bank.
#define UART1
UART1 register bank.
Common macros and compiler attributes/pragmas configuration.
ADC device configuration.
Definition periph_cpu.h:377
PIO configuration type.
Definition periph_cpu.h:462
PIO I2C configuration type.
Definition periph_cpu.h:471
PWM device configuration.
SPI device configuration.
Definition periph_cpu.h:333
Configuration type of a timer channel.
Definition periph_cpu.h:444
Timer device configuration.
Definition periph_cpu.h:260
UART device configuration.
Definition periph_cpu.h:214