Loading...
Searching...
No Matches
periph_conf.h
Go to the documentation of this file.
1/*
2 * Copyright (C) 2019 Mesotic SAS
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
20#ifndef PERIPH_CONF_H
21#define PERIPH_CONF_H
22
23#include "periph_cpu.h"
24#include "macros/units.h"
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
33#define CLOCK_CORECLOCK MHZ(48)
34
39#define USE_VREG_BUCK (1)
40
45static const tc32_conf_t timer_config[] = {
46 { /* Timer 0 - System Clock */
47 .dev = TC0,
48 .irq = TC0_IRQn,
49 .mclk = &MCLK->APBCMASK.reg,
50 .mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
51 .gclk_id = TC0_GCLK_ID,
52 .gclk_src = SAM0_GCLK_TIMER,
53 .flags = TC_CTRLA_MODE_COUNT32,
54 },
55 {
56 .dev = TC2,
57 .irq = TC2_IRQn,
58 .mclk = &MCLK->APBCMASK.reg,
59 .mclk_mask = MCLK_APBCMASK_TC2 | MCLK_APBCMASK_TC3,
60 .gclk_id = TC2_GCLK_ID,
61 .gclk_src = SAM0_GCLK_TIMER,
62 .flags = TC_CTRLA_MODE_COUNT32,
63 }
64};
65
66/* Timer 0 configuration */
67#define TIMER_0_CHANNELS 2
68#define TIMER_0_ISR isr_tc0
69#define TIMER_1_CHANNELS 2
70#define TIMER_1_ISR isr_tc2
71#define TIMER_NUMOF ARRAY_SIZE(timer_config)
78static const uart_conf_t uart_config[] = {
79 { /* Virtual COM Port */
80 .dev = &SERCOM0->USART,
81 .rx_pin = GPIO_PIN(PA, 5),
82 .tx_pin = GPIO_PIN(PA, 4),
83#ifdef MODULE_PERIPH_UART_HW_FC
84 .rts_pin = GPIO_UNDEF,
85 .cts_pin = GPIO_UNDEF,
86#endif
87 .mux = GPIO_MUX_D,
88 .rx_pad = UART_PAD_RX_1,
89 .tx_pad = UART_PAD_TX_0,
90 .flags = UART_FLAG_NONE,
91 .gclk_src = SAM0_GCLK_MAIN,
92 },
93 { /* EXT1 */
94 .dev = &SERCOM3->USART,
95 .rx_pin = GPIO_PIN(PA, 17),
96 .tx_pin = GPIO_PIN(PA, 16),
97#ifdef MODULE_PERIPH_UART_HW_FC
98 .rts_pin = GPIO_UNDEF,
99 .cts_pin = GPIO_UNDEF,
100#endif
101 .mux = GPIO_MUX_D,
102 .rx_pad = UART_PAD_RX_1,
103 .tx_pad = UART_PAD_TX_0,
104 .flags = UART_FLAG_NONE,
105 .gclk_src = SAM0_GCLK_MAIN,
106 }
107};
108
109/* interrupt function name mapping */
110#define UART_0_ISR isr_sercom0
111#define UART_1_ISR isr_sercom3
112
113#define UART_NUMOF ARRAY_SIZE(uart_config)
120static const spi_conf_t spi_config[] = {
121 { /* internal, wired to sx1276 */
122 .dev = &(SERCOM4->SPI),
123 .miso_pin = GPIO_PIN(PC, 19),
124 .mosi_pin = GPIO_PIN(PB, 30),
125 .clk_pin = GPIO_PIN(PC, 18),
126 .miso_mux = GPIO_MUX_F,
127 .mosi_mux = GPIO_MUX_F,
128 .clk_mux = GPIO_MUX_F,
129 .miso_pad = SPI_PAD_MISO_0,
130 .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
131 .gclk_src = SAM0_GCLK_MAIN,
132#ifdef MODULE_PERIPH_DMA
133 .tx_trigger = SERCOM4_DMAC_ID_TX,
134 .rx_trigger = SERCOM4_DMAC_ID_RX,
135#endif
136 },
137 { /* EXT1, EXT3, NOR Flash */
138 .dev = &(SERCOM5->SPI),
139 .miso_pin = GPIO_PIN(PB, 2),
140 .mosi_pin = GPIO_PIN(PB, 22),
141 .clk_pin = GPIO_PIN(PB, 23),
142 .miso_mux = GPIO_MUX_D,
143 .mosi_mux = GPIO_MUX_D,
144 .clk_mux = GPIO_MUX_D,
145 .miso_pad = SPI_PAD_MISO_0,
146 .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
147 .gclk_src = SAM0_GCLK_MAIN,
148#ifdef MODULE_PERIPH_DMA
149 .tx_trigger = DMA_TRIGGER_DISABLED,
150 .rx_trigger = DMA_TRIGGER_DISABLED,
151#endif
152 },
153};
154
155#define SPI_NUMOF ARRAY_SIZE(spi_config)
162static const i2c_conf_t i2c_config[] = {
163 {
164 .dev = &(SERCOM1->I2CM),
165 .speed = I2C_SPEED_NORMAL,
166 .scl_pin = GPIO_PIN(PA, 17),
167 .sda_pin = GPIO_PIN(PA, 16),
168 .mux = GPIO_MUX_C,
169 .gclk_src = SAM0_GCLK_MAIN,
170 .flags = I2C_FLAG_NONE
171 }
172};
173#define I2C_NUMOF ARRAY_SIZE(i2c_config)
180#define EXTERNAL_OSC32_SOURCE 1
181#define INTERNAL_OSC32_SOURCE 0
182#define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 0
189#ifndef RTT_FREQUENCY
190#define RTT_FREQUENCY (32768U)
191#endif
199/* ADC 0 Default values */
200#define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV256
201
202#define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
203#define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2
204
205static const adc_conf_chan_t adc_channels[] = {
206 /* port, pin, muxpos */
208 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA07 }
209};
210
211#define ADC_NUMOF ARRAY_SIZE(adc_channels)
218static const sam0_common_usb_config_t sam_usbdev_config[] = {
219 {
220 .dm = GPIO_PIN(PA, 24),
221 .dp = GPIO_PIN(PA, 25),
222 .d_mux = GPIO_MUX_G,
223 .device = &USB->DEVICE,
224 .gclk_src = SAM0_GCLK_48MHZ,
225 }
226};
229#ifdef __cplusplus
230}
231#endif
232
233#endif /* PERIPH_CONF_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:278
@ UART_PAD_RX_1
select pad 1
@ PB
port B
@ PC
port C
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_0
use pad 0 for MISO line
#define DMA_TRIGGER_DISABLED
Indicates that the peripheral doesn't utilize the DMA controller.
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_0
select pad 0
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_G
select peripheral function G
@ GPIO_MUX_C
select peripheral function C
@ GPIO_MUX_F
select peripheral function F
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
Definition periph_cpu.h:126
#define ADC_INPUTCTRL_MUXPOS_PA06
Alias for PIN6.
Definition periph_cpu.h:125
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition periph_cpu.h:74
#define SAM0_GCLK_TIMER
4-8 MHz clock for xTimer
Definition periph_cpu.h:79
ADC Channel Configuration.
uint32_t inputctrl
ADC channel pin multiplexer value
I2C configuration structure.
Definition periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition periph_cpu.h:300
USB peripheral parameters.
SPI device configuration.
Definition periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition periph_cpu.h:338
Timer device configuration.
Tc * dev
pointer to the used Timer device
UART device configuration.
Definition periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:219
Unit helper macros.