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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2015-2020 Freie Universität Berlin
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
18
19#include "cpu.h"
20#include "periph_cpu.h"
21#include "em_cmu.h"
22#include "usbdev_cfg_otg_fs.h"
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
32#ifndef CLOCK_HF
33#define CLOCK_HF cmuSelect_HFXO
34#endif
35#ifndef CLOCK_CORE_DIV
36#define CLOCK_CORE_DIV cmuClkDiv_1
37#endif
38#ifndef CLOCK_LFA
39#define CLOCK_LFA cmuSelect_LFXO
40#endif
41#ifndef CLOCK_LFB
42#define CLOCK_LFB cmuSelect_LFXO
43#endif
45
50static const adc_conf_t adc_config[] = {
51 {
52 .dev = ADC0,
53 .cmu = cmuClock_ADC0,
54 }
55};
56
57static const adc_chan_conf_t adc_channel_config[] = {
58 {
59 .dev = 0,
60 .input = adcSingleInputTemp,
61 .reference = adcRef1V25,
62 .acq_time = adcAcqTime8
63 },
64 {
65 .dev = 0,
66 .input = adcSingleInputVDDDiv3,
67 .reference = adcRef1V25,
68 .acq_time = adcAcqTime8
69 }
70};
71
72#define ADC_DEV_NUMOF ARRAY_SIZE(adc_config)
73#define ADC_NUMOF ARRAY_SIZE(adc_channel_config)
75
80static const dac_conf_t dac_config[] = {
81 {
82 .dev = DAC0,
83 .ref = dacRefVDD,
84 .cmu = cmuClock_DAC0,
85 }
86};
87
88static const dac_chan_conf_t dac_channel_config[] = {
89 {
90 .dev = 0,
91 .index = 1,
92 }
93};
94
95#define DAC_DEV_NUMOF ARRAY_SIZE(dac_config)
96#define DAC_NUMOF ARRAY_SIZE(dac_channel_config)
98
103static const i2c_conf_t i2c_config[] = {
104 {
105 .dev = I2C0,
106 .sda_pin = GPIO_PIN(PD, 6),
107 .scl_pin = GPIO_PIN(PD, 7),
108 .loc = I2C_ROUTE_LOCATION_LOC1,
109 .cmu = cmuClock_I2C0,
110 .irq = I2C0_IRQn,
111 .speed = I2C_SPEED_NORMAL
112 },
113 {
114 .dev = I2C1,
115 .sda_pin = GPIO_PIN(PC, 4),
116 .scl_pin = GPIO_PIN(PC, 5),
117 .loc = I2C_ROUTE_LOCATION_LOC0,
118 .cmu = cmuClock_I2C1,
119 .irq = I2C1_IRQn,
120 .speed = I2C_SPEED_NORMAL
121 }
122};
123
124#define I2C_NUMOF ARRAY_SIZE(i2c_config)
125#define I2C_0_ISR isr_i2c0
126#define I2C_1_ISR isr_i2c1
128
133static const pwm_chan_conf_t pwm_channel_config[] = {
134 {
135 .index = 2,
136 .pin = GPIO_PIN(PE, 2),
137 .loc = TIMER_ROUTE_LOCATION_LOC1
138 }
139};
140
141static const pwm_conf_t pwm_config[] = {
142 {
143 .dev = TIMER3,
144 .cmu = cmuClock_TIMER3,
145 .irq = TIMER3_IRQn,
146 .channels = 1,
147 .channel = pwm_channel_config
148 }
149};
150
151#define PWM_DEV_NUMOF ARRAY_SIZE(pwm_config)
152#define PWM_NUMOF ARRAY_SIZE(pwm_channel_config)
154
159#ifndef RTT_FREQUENCY
160#define RTT_FREQUENCY (1U) /* in Hz */
161#endif
163
168static const spi_dev_t spi_config[] = {
169 {
170 .dev = USART1,
171 .mosi_pin = GPIO_PIN(PD, 0),
172 .miso_pin = GPIO_PIN(PD, 1),
173 .clk_pin = GPIO_PIN(PD, 2),
174 .loc = USART_ROUTE_LOCATION_LOC1,
175 .cmu = cmuClock_USART1,
176 .irq = USART1_RX_IRQn
177 },
178 {
179 .dev = USART2,
180 .mosi_pin = GPIO_UNDEF,
181 .miso_pin = GPIO_PIN(PC, 3),
182 .clk_pin = GPIO_PIN(PC, 4),
183 .loc = USART_ROUTE_LOCATION_LOC0,
184 .cmu = cmuClock_USART2,
185 .irq = USART2_RX_IRQn
186 }
187};
188
189#define SPI_NUMOF ARRAY_SIZE(spi_config)
191
198static const timer_conf_t timer_config[] = {
199 {
200 .prescaler = {
201 .dev = TIMER0,
202 .cmu = cmuClock_TIMER0
203 },
204 .timer = {
205 .dev = TIMER1,
206 .cmu = cmuClock_TIMER1
207 },
208 .irq = TIMER1_IRQn,
209 .channel_numof = 3
210 },
211 {
212 .prescaler = {
213 .dev = NULL,
214 .cmu = cmuClock_LETIMER0
215 },
216 .timer = {
217 .dev = LETIMER0,
218 .cmu = cmuClock_LETIMER0
219 },
220 .irq = LETIMER0_IRQn,
221 .channel_numof = 2
222 }
223};
224
225#define TIMER_NUMOF ARRAY_SIZE(timer_config)
226#define TIMER_0_ISR isr_timer1
227#define TIMER_1_ISR isr_letimer0
229
234static const uart_conf_t uart_config[] = {
235 {
236 .dev = UART0,
237 .rx_pin = GPIO_PIN(PE, 1),
238 .tx_pin = GPIO_PIN(PE, 0),
239 .loc = UART_ROUTE_LOCATION_LOC1,
240 .cmu = cmuClock_UART0,
241 .irq = UART0_RX_IRQn
242 },
243 {
244 .dev = LEUART0,
245 .rx_pin = GPIO_PIN(PD, 5),
246 .tx_pin = GPIO_PIN(PD, 4),
247 .loc = LEUART_ROUTE_LOCATION_LOC0,
248 .cmu = cmuClock_LEUART0,
249 .irq = LEUART0_IRQn
250 }
251};
252
253#define UART_NUMOF ARRAY_SIZE(uart_config)
254#define UART_0_ISR_RX isr_uart0_rx
255#define UART_1_ISR_RX isr_leuart0
257
258#ifdef __cplusplus
259}
260#endif
261
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:277
#define UART0
UART0 register bank.
@ PC
port C
@ PD
port D
ADC channel configuration.
Definition periph_cpu.h:385
ADC device configuration.
Definition periph_cpu.h:377
DAC line configuration data.
Definition periph_cpu.h:300
I2C configuration structure.
Definition periph_cpu.h:298
PWM channel configuration.
Definition periph_cpu.h:467
PWM device configuration.
SPI device configuration.
Definition periph_cpu.h:516
Timer device configuration.
Definition periph_cpu.h:263
UART device configuration.
Definition periph_cpu.h:217
Common configuration for EFM32 OTG FS peripheral.