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cc2538_rfcore.h
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1/*
2 * Copyright (C) 2014 Loci Controls Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
21#ifndef CC2538_RFCORE_H
22#define CC2538_RFCORE_H
23
24#include "cc2538.h"
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
33typedef struct {
56 cc2538_reg_t RESERVED1[10];
58 union {
60 struct {
61 cc2538_reg_t FRAME_FILTER_EN : 1;
62 cc2538_reg_t PAN_COORDINATOR : 1;
63 cc2538_reg_t MAX_FRAME_VERSION: 2;
65 } XREG_FRMFILT0bits;
66 };
67
77 union {
79 struct {
80 cc2538_reg_t TX_MODE : 2;
81 cc2538_reg_t RX_MODE : 2;
82 cc2538_reg_t ENERGY_SCAN : 1;
83 cc2538_reg_t AUTOACK : 1;
84 cc2538_reg_t AUTOCRC : 1;
85 cc2538_reg_t APPEND_DATA_MODE : 1;
86 cc2538_reg_t RESERVED : 24;
87 } XREG_FRMCTRL0bits;
88 };
89
99 union {
101 struct {
102 cc2538_reg_t FSM_FFCTRL_STATE : 6;
103 cc2538_reg_t CAL_RUNNING : 1;
104 cc2538_reg_t CAL_DONE : 1;
105 cc2538_reg_t RESERVED : 24;
106 } XREG_FSMSTAT0bits;
107 };
108
109 union {
111 struct {
112 cc2538_reg_t RX_ACTIVE : 1;
113 cc2538_reg_t TX_ACTIVE : 1;
114 cc2538_reg_t LOCK_STATUS : 1;
115 cc2538_reg_t SAMPLED_CCA : 1;
116 cc2538_reg_t CCA : 1;
117 cc2538_reg_t SFD : 1;
118 cc2538_reg_t FIFOP : 1;
119 cc2538_reg_t FIFO : 1;
120 cc2538_reg_t RESERVED : 24;
121 } XREG_FSMSTAT1bits;
122 };
123
133 union {
135 struct {
137 cc2538_reg_t RESERVED : 31;
138 } XREG_RSSISTATbits;
139 };
140
158 union {
160 struct {
163 cc2538_reg_t RESERVED : 30;
164 } XREG_RFRNDbits;
165 };
166
191 cc2538_reg_t RESERVED4[32];
198 cc2538_reg_t RESERVED5[5];
202 cc2538_reg_t RESERVED6[12];
204 cc2538_reg_t RESERVED7[5];
221
222#define RFCORE ( (cc2538_rfcore_t*)0x40088580 )
225enum {
226 DECZ = 0xc5,
227 DECY = 0xc4,
228 DECX = 0xc3,
229 INCZ = 0xc2,
230 INCY = 0xc1,
231 INCX = 0xc0,
232 INCMAXY = 0xc8,
233 RANDXY = 0xbd,
234 INT = 0xba,
235 WAITX = 0xbc,
236 SETCMP1 = 0xbe,
237 WAIT_W = 0x80,
238 WEVENT1 = 0xb8,
239 WEVENT2 = 0xb9,
240 LABEL = 0xbb,
241 RPT_C = 0xa0,
242 SKIP_S_C = 0x00,
243 STOP = 0xd2,
244 SNOP = 0xd0,
245 SRXON = 0xd3,
246 STXON = 0xd9,
247 STXONCCA = 0xda,
248 SSAMPLECCA = 0xdb,
249 SRFOFF = 0xdf,
250 SFLUSHRX = 0xdd,
251 SFLUSHTX = 0xde,
252 SACK = 0xd6,
253 SACKPEND = 0xd7,
254 SNACK = 0xd8,
257 ISSTOP = 0xe2,
258 ISSTART = 0xe1,
259 ISRXON = 0xe3,
262 ISTXON = 0xe9,
263 ISTXONCCA = 0xea,
264 ISSAMPLECCA = 0xeb,
265 ISRFOFF = 0xef,
266 ISFLUSHRX = 0xed,
267 ISFLUSHTX = 0xee,
268 ISACK = 0xe6,
269 ISACKPEND = 0xe7,
270 ISNACK = 0xe8,
271 ISCLEAR = 0xff,
272};
273
274#ifdef __cplusplus
275} /* extern "C" */
276#endif
277
278#endif /* CC2538_RFCORE_H */
CC2538 MCU interrupt and register definitions.
volatile uint32_t cc2538_reg_t
Least-significant 32 bits of the IEEE address.
Definition cc2538.h:124
@ SFD
Start of frame event.
Definition cc2538_rf.h:177
@ SNOP
No operation.
@ LABEL
Set loop label.
@ SFLUSHRX
Flush RX FIFO buffer and reset demodulator.
@ INCX
Increment X.
@ SKIP_S_C
Conditional skip instruction | S | N | C.
@ SACKPEND
Send acknowledge frame with the pending field set.
@ WEVENT2
Wait until MAC timer event 2.
@ WAIT_W
Wait for W MAC timer overflows | W (W = 0-31)
@ INCY
Increment Y.
@ ISCLEAR
Clear CSP program memory, reset program counter.
@ RPT_C
Conditional repeat | N | C (N = 0, 8; C = 0-7)
@ ISRXMASKBITCLR
Clear bit in RXENABLE.
@ SNACK
Abort sending of acknowledge frame.
@ ISFLUSHTX
Flush TX FIFO buffer.
@ ISSTOP
Stop program execution.
@ ISRXON
Enable and calibrate frequency synthesizer for RX.
@ SRXON
Enable and calibrate frequency synthesizer for RX.
@ STXONCCA
Enable calibration and TX if CCA indicates a clear channel.
@ DECX
Decrement X.
@ STOP
Stop program execution.
@ SACK
Send acknowledge frame with pending field cleared.
@ ISTXONCCA
Enable calibration and TX if CCA indicates a clear channel.
@ ISSAMPLECCA
Sample the current CCA value to SAMPLED_CCA.
@ DECZ
Decrement Z.
@ SRXMASKBITCLR
Clear bit in RXENABLE register.
@ ISACK
Send acknowledge frame with the pending field cleared.
@ DECY
Decrement Y.
@ SETCMP1
Set the compare value of the MAC timer to the current timer value.
@ WAITX
Wait for X MAC timer overflows.
@ ISTXON
Enable TX after calibration.
@ INCMAXY
Increment Y not greater than M.
@ SRXMASKBITSET
Set bit in RXENABLE register.
@ ISFLUSHRX
Flush RX FIFO buffer and reset demodulator.
@ SRFOFF
Disable RX or TX and frequency synthesizer.
@ RANDXY
Load random value into X.
@ ISACKPEND
Send acknowledge frame with the pending field set.
@ ISRFOFF
Disable RX or TX, and the frequency synthesizer.
@ STXON
Enable TX after calibration.
@ ISSTART
Start program execution.
@ INCZ
Increment Z.
@ WEVENT1
Wait until MAC timer event 1.
@ ISRXMASKBITSET
Set bit in RXENABLE.
@ SFLUSHTX
Flush TX FIFO buffer.
@ SSAMPLECCA
Sample the current CCA value to SAMPLED_CCA.
@ ISNACK
Abort sending of acknowledge frame.
@ INT
Interrupt.
RF Core component registers.
cc2538_reg_t XREG_FSMSTAT0
RF Radio status register.
cc2538_reg_t SFR_MTMOVF0
RF MAC Timer multiplexed overflow register 0.
cc2538_reg_t SFR_MTMSEL
RF MAC Timer multiplex select.
cc2538_reg_t FFSM_SRCRESMASK2
RF Source address matching result.
cc2538_reg_t SFR_MTMOVF1
RF MAC Timer multiplexed overflow register 1.
cc2538_reg_t XREG_CSPT
RF CSP T data register.
cc2538_reg_t XREG_AGCCTRL1
RF AGC reference level.
cc2538_reg_t FFSM_PAN_ID0
RF Local address information.
cc2538_reg_t FFSM_SRCRESINDEX
RF Source address matching result.
cc2538_reg_t XREG_FSCAL3
RF Tune frequency calibration.
cc2538_reg_t XREG_FREQEST
RF Estimated RF frequency offset.
cc2538_reg_t XREG_FRMFILT1
RF Frame Filter 1.
cc2538_reg_t FFSM_EXT_ADDR0
RF Local address information.
cc2538_reg_t XREG_RFC_OBS_CTRL1
RF observation mux control.
cc2538_reg_t XREG_CSPCTRL
RF CSP control bit.
cc2538_reg_t FFSM_SRCRESMASK0
RF Source address matching result.
cc2538_reg_t XREG_ATEST
RF Analog test control.
cc2538_reg_t FFSM_SRCEXTPENDEN1
RF Source address matching control.
cc2538_reg_t XREG_RFIRQM0
RF interrupt masks.
cc2538_reg_t FFSM_SRCSHORTPENDEN0
RF Source address matching control.
cc2538_reg_t SFR_MTM1
RF MAC Timer multiplexed register 1.
cc2538_reg_t XREG_RXMASKSET
RF RX enabling.
cc2538_reg_t XREG_RXFIRST
RF First byte in RX FIFO.
cc2538_reg_t XREG_RXCTRL
RF Tune receive section.
cc2538_reg_t SFR_MTM0
RF MAC Timer multiplexed register 0.
cc2538_reg_t XREG_CSPY
RF CSP Y data register.
cc2538_reg_t XREG_CCACTRL1
RF Other CCA Options.
cc2538_reg_t XREG_SRCSHORTEN1
RF Short address matching.
cc2538_reg_t SFR_MTIRQM
RF MAC Timer interrupt mask.
cc2538_reg_t XREG_FRMCTRL0
RF Frame handling.
cc2538_reg_t XREG_RFIRQM1
RF interrupt masks.
cc2538_reg_t XREG_FSMSTAT1
RF Radio status register.
cc2538_reg_t XREG_RXENABLE
RF RX enabling.
cc2538_reg_t XREG_FIFOPCTRL
RF FIFOP threshold.
cc2538_reg_t XREG_RFC_OBS_CTRL2
RF observation mux control.
cc2538_reg_t XREG_FSCAL1
RF Tune frequency calibration.
cc2538_reg_t FFSM_EXT_ADDR1
RF Local address information.
cc2538_reg_t FFSM_SRCEXTPENDEN2
RF Source address matching control.
cc2538_reg_t XREG_RXFIRST_PTR
RF RX FIFO pointer.
cc2538_reg_t RESERVED2
Reserved bytes.
cc2538_reg_t QRND
Random bit from the Q channel of the receiver.
cc2538_reg_t FFSM_EXT_ADDR2
RF Local address information.
cc2538_reg_t XREG_SRCEXTEN2
RF Extended address matching.
cc2538_reg_t XREG_RSSISTAT
RF RSSI valid status register.
cc2538_reg_t XREG_FRMFILT0
RF Frame Filter 0.
cc2538_reg_t XREG_TXFIFOCNT
RF Number of bytes in TX FIFO.
cc2538_reg_t XREG_FREQTUNE
RF Crystal oscillator frequency tuning.
cc2538_reg_t XREG_TXLAST_PTR
RF TX FIFO pointer.
cc2538_reg_t XREG_FRMCTRL1
RF Frame handling.
cc2538_reg_t XREG_RXMASKCLR
RF RX disabling.
cc2538_reg_t FFSM_SRCRESMASK1
RF Source address matching result.
cc2538_reg_t XREG_SRCEXTEN1
RF Extended address matching.
cc2538_reg_t XREG_CSPZ
RF CSP Z data register.
cc2538_reg_t FFSM_EXT_ADDR5
RF Local address information.
cc2538_reg_t XREG_CSPX
RF CSP X data register.
cc2538_reg_t SFR_MTCSPCFG
RF MAC Timer event configuration.
cc2538_reg_t XREG_TXPOWER
RF Controls the output power.
cc2538_reg_t XREG_PTEST1
RF Override power-down register.
cc2538_reg_t XREG_TXFILTCFG
RF TX filter configuration.
cc2538_reg_t XREG_MDMCTRL1
RF Controls modem.
cc2538_reg_t FFSM_PAN_ID1
RF Local address information.
cc2538_reg_t XREG_MDMTEST1
RF Test Register for Modem.
cc2538_reg_t XREG_AGCCTRL2
RF AGC gain override.
cc2538_reg_t XREG_DACTEST1
RF DAC override value.
cc2538_reg_t XREG_SRCEXTEN0
RF Extended address matching.
cc2538_reg_t XREG_ADCTEST2
RF ADC tuning.
cc2538_reg_t XREG_AGCCTRL0
RF AGC dynamic range control.
cc2538_reg_t FFSM_SRCEXTPENDEN0
RF Source address matching control.
cc2538_reg_t XREG_RXP1_PTR
RF RX FIFO pointer.
cc2538_reg_t XREG_ADCTEST0
RF ADC tuning.
cc2538_reg_t FFSM_EXT_ADDR4
RF Local address information.
cc2538_reg_t XREG_RFC_OBS_CTRL0
RF observation mux control.
cc2538_reg_t XREG_RFERRM
RF error interrupt mask.
cc2538_reg_t XREG_FSCAL2
RF Tune frequency calibration.
cc2538_reg_t XREG_CSPSTAT
RF CSP status register.
cc2538_reg_t XREG_FSCTRL
RF Tune frequency synthesizer.
cc2538_reg_t XREG_DACTEST2
RF DAC test setting.
cc2538_reg_t FFSM_EXT_ADDR6
RF Local address information.
cc2538_reg_t XREG_SRCSHORTEN0
RF Short address matching.
cc2538_reg_t RESERVED3
Reserved bytes.
cc2538_reg_t XREG_RXLAST_PTR
RF RX FIFO pointer.
cc2538_reg_t XREG_ADCTEST1
RF ADC tuning.
cc2538_reg_t SFR_RFDATA
RF Tx/Rx FIFO.
cc2538_reg_t XREG_FSMCTRL
RF FSM options.
cc2538_reg_t XREG_SRCSHORTEN2
RF Short address matching.
cc2538_reg_t XREG_DACTEST0
RF DAC override value.
cc2538_reg_t SFR_RFST
RF CSMA-CA/strobe processor.
cc2538_reg_t FFSM_EXT_ADDR3
RF Local address information.
cc2538_reg_t FFSM_SHORT_ADDR1
RF Local address information.
cc2538_reg_t XREG_CCACTRL0
RF CCA threshold.
cc2538_reg_t XREG_MDMCTRL0
RF Controls modem.
cc2538_reg_t XREG_RXFIFOCNT
RF Number of bytes in RX FIFO.
cc2538_reg_t RESERVED
Reserved bits.
cc2538_reg_t XREG_RFRND
RF Random data.
cc2538_reg_t FFSM_EXT_ADDR7
RF Local address information.
cc2538_reg_t FFSM_SRCSHORTPENDEN1
RF Source address matching control.
cc2538_reg_t SFR_RFERRF
RF error interrupt flags.
cc2538_reg_t FFSM_SRCSHORTPENDEN2
RF Source address matching control.
cc2538_reg_t IRND
Random bit from the I channel of the receiver.
cc2538_reg_t XREG_TXCTRL
RF Controls the TX settings.
cc2538_reg_t XREG_FSCAL0
RF Tune frequency calibration.
cc2538_reg_t XREG_SRCMATCH
RF Source address matching and pending bits.
cc2538_reg_t XREG_PTEST0
RF Override power-down register.
cc2538_reg_t SFR_MTIRQF
RF MAC Timer interrupt flags.
cc2538_reg_t SFR_RFIRQF1
RF interrupt flags.
cc2538_reg_t XREG_MDMTEST0
RF Test register for modem.
cc2538_reg_t XREG_FREQCTRL
RF Controls the RF frequency.
cc2538_reg_t SFR_RFIRQF0
RF interrupt flags.
cc2538_reg_t XREG_TXFIRST_PTR
RF TX FIFO pointer.
cc2538_reg_t XREG_RSSI
RF RSSI status register.
cc2538_reg_t XREG_AGCCTRL3
RF AGC control.
cc2538_reg_t SFR_MTCTRL
RF MAC Timer control register.
cc2538_reg_t SFR_MTMOVF2
RF MAC Timer multiplexed overflow register 2.
cc2538_reg_t FFSM_SHORT_ADDR0
RF Local address information.
cc2538_reg_t RSSI_VALID
RSSI value is valid.