Texas Instruments CC26x0/CC13x0 memory mappings for peripherals. More...

Detailed Description

Texas Instruments CC26x0/CC13x0 memory mappings for peripherals.

#define	AUX_AIODIO0_BASE 0x400C1000
	AUX_AIODIO0 base address.

#define	AUX_AIODIO0_BASE (PERIPH_BASE + 0xCC000)
	AUX_AIODIO0 base address.

#define	AUX_AIODIO1_BASE (PERIPH_BASE + 0xCD000)
	AUX_AIODIO1 base address.

#define	AUX_AIODIO2_BASE (PERIPH_BASE + 0xCE000)
	AUX_AIODIO2 base address.

#define	AUX_AIODIO3_BASE (PERIPH_BASE + 0xCF000)
	AUX_AIODIO3 base address.

#define	AUX_TDC_BASE 0x400C4000
	AUX_TDC base address.

#define	AUX_TDC_BASE (PERIPH_BASE + 0xC4000)
	AUX_TDC base address.

#define	AUX_EVCTL_BASE 0x400C5000
	AUX_EVCTL base address.

#define	AUX_EVCTL_BASE (PERIPH_BASE + 0xC5000)
	AUX_EVCTL base address.

#define	AUX_WUC_BASE 0x400C6000
	AUX_WUC base address.

#define	AUX_TIMER_BASE 0x400C7000
	AUX_WUC base address.

#define	AUX_SMPH_BASE 0x400C8000
	AUX_WUC base address.

#define	AUX_SMPH_BASE (PERIPH_BASE + 0xC8000)
	AUX_SMPH base address.

#define	AUX_ANAIF_BASE 0x400C9000
	AUX_WUC base address.

#define	AUX_ANAIF_BASE (PERIPH_BASE + 0xC9000)
	AUX_ANAIF base address.

#define	ADI_4_AUX_BASE 0x400CB000
	AUX_WUC base address.

#define	ADI_4_AUX_BASE (PERIPH_BASE + 0xCB000)
	ADI_4_AUX base address.

#define	ADI_4_AUX_BASE_M8 (ADI_4_AUX_BASE + ADI_MASK8B)
	ADI_4_AUX base address for masked 8-bit access.

#define	FCFG_BASE (0x50001000)
	Base address of FCFG memory.

#define	FCFG_BASE (0x50001000)
	FCFG1 base address.

#define	DDI0_OSC_BASE 0x400CA000
	DDI0_OSC base address.

#define	AON_SYSCTL_BASE 0x40090000
	AON_SYSCTL base address.

#define	AON_WUC_BASE 0x40091000
	AON_WUC base address.

#define	AON_RTC_BASE (PERIPH_BASE + 0x92000)
	AON_RTC base address.

#define	AON_RTC_BASE (PERIPH_BASE + 0x92000)
	AON_RTC base address.

#define	PRCM_BASE (PERIPH_BASE + 0x82000)
	PRCM base address.

#define	PRCM_BASE (PERIPH_BASE + 0x82000)
	PRCM base address.

#define	PRCM_BASE_NONBUF (PERIPH_BASE_NONBUF + 0x82000)
	PRCM base address (nonbuf)

#define	AUX_SYSIF_BASE (PERIPH_BASE + 0xC6000)
	AUX_SYSIF base address.

#define	AUX_TIMER01_BASE (PERIPH_BASE + 0xC7000)
	AUX_TIMER01 base address.

#define	AUX_TIMER2_BASE (PERIPH_BASE + 0xC3000)
	AUX_TIMER2 base address.

#define	AON_PMCTL_BASE (PERIPH_BASE + 0x90000)
	AON_PMCTL base address.

#define	FLASH_BASE 0x00000000
	CMSIS includes.

#define	PERIPH_BASE 0x40000000
	Peripheral base address.

#define	PERIPH_BASE_NONBUF 0x60000000
	Peripheral base address (nonbuf)

#define	ROM_HARD_API_BASE 0x10000048
	ROM Hard-API base address.

#define	ROM_API_TABLE ((uint32_t *) 0x10000180)
	ROM API table.

#define	ADI_3_REFSYS_BASE (PERIPH_BASE + 0x86200)
	ADI3 base address.

#define	ADI_3_REFSYS_BASE_SET (ADI_3_REFSYS_BASE + ADI_SET)
	ADI3 base address for SET instruction.

#define	ADI_3_REFSYS_BASE_CLR (ADI_3_REFSYS_BASE + ADI_CLR)
	ADI3 base address for CLR instruction.

#define	ADI_3_REFSYS_BASE_M4 (ADI_3_REFSYS_BASE + ADI_MASK4B)
	ADI3 base address for 4-bit masked access.

#define	CCFG_BASE (0x50003000)
	CCFG base address.

#define	GPIO_BASE (0x40022000)
	GPIO base address.

#define	I2C_BASE (PERIPH_BASE + 0x2000)
	I2C base address.

#define	MCU_IOC_BASE (0x40081000)
	IOC (MCU) base address.

#define	AON_IOC_BASE (PERIPH_BASE + 0x94000)
	AON_IOC base address.

#define	RFC_DBELL_BASE (PERIPH_BASE + 0x41000)
	RFC_DBELL base address.

#define	RFC_DBELL_BASE_NONBUF (PERIPH_BASE_NONBUF + 0x41000)
	RFC_DBELL base address.

#define	RFC_PWR_BASE (PERIPH_BASE + 0x40000)
	RFC_PWR base address.

#define	RFC_PWR_BASE_NONBUF (PERIPH_BASE_NONBUF + 0x40000)
	RFC_PWR base address.

#define	UART0_BASE (PERIPH_BASE + 0x1000)
	UART0 base address.

#define	UART1_BASE (PERIPH_BASE + 0xB000)
	UART1 base address.

#define	FLASH_BASEADDR (PERIPH_BASE + 0x30000)
	FLASH base address.

#define	VIMS_BASE (PERIPH_BASE + 0x34000)
	VIMS base address.

#define	WDT_BASE 0x40080000
	WDT base address.

Macro Definition Documentation

◆ ADI_3_REFSYS_BASE

#define ADI_3_REFSYS_BASE (PERIPH_BASE + 0x86200)

ADI3 base address.

Definition at line 89 of file cc26xx_cc13xx_adi.h.

◆ ADI_3_REFSYS_BASE_CLR

#define ADI_3_REFSYS_BASE_CLR (ADI_3_REFSYS_BASE + ADI_CLR)

ADI3 base address for CLR instruction.

Definition at line 97 of file cc26xx_cc13xx_adi.h.

◆ ADI_3_REFSYS_BASE_M4

#define ADI_3_REFSYS_BASE_M4 (ADI_3_REFSYS_BASE + ADI_MASK4B)

ADI3 base address for 4-bit masked access.

Definition at line 101 of file cc26xx_cc13xx_adi.h.

◆ ADI_3_REFSYS_BASE_SET

#define ADI_3_REFSYS_BASE_SET (ADI_3_REFSYS_BASE + ADI_SET)

ADI3 base address for SET instruction.

Definition at line 93 of file cc26xx_cc13xx_adi.h.

◆ ADI_4_AUX_BASE [1/2]

#define ADI_4_AUX_BASE 0x400CB000

AUX_WUC base address.

ADI_4_AUX base address.

Definition at line 245 of file cc26x0_cc13x0_aux.h.

◆ ADI_4_AUX_BASE [2/2]

#define ADI_4_AUX_BASE (PERIPH_BASE + 0xCB000)

ADI_4_AUX base address.

Definition at line 454 of file cc26x2_cc13x2_aux.h.

◆ ADI_4_AUX_BASE_M8

#define ADI_4_AUX_BASE_M8 (ADI_4_AUX_BASE + ADI_MASK8B)

ADI_4_AUX base address for masked 8-bit access.

Definition at line 458 of file cc26x2_cc13x2_aux.h.

◆ AON_IOC_BASE

#define AON_IOC_BASE (PERIPH_BASE + 0x94000)

AON_IOC base address.

Definition at line 173 of file cc26xx_cc13xx_ioc.h.

◆ AON_PMCTL_BASE

#define AON_PMCTL_BASE (PERIPH_BASE + 0x90000)

AON_PMCTL base address.

Definition at line 198 of file cc26x2_cc13x2_prcm.h.

◆ AON_RTC_BASE [1/2]

#define AON_RTC_BASE (PERIPH_BASE + 0x92000)

AON_RTC base address.

Definition at line 228 of file cc26x0_cc13x0_prcm.h.

◆ AON_RTC_BASE [2/2]

#define AON_RTC_BASE (PERIPH_BASE + 0x92000)

AON_RTC base address.

Definition at line 237 of file cc26x2_cc13x2_prcm.h.

◆ AON_SYSCTL_BASE

#define AON_SYSCTL_BASE 0x40090000

AON_SYSCTL base address.

Definition at line 97 of file cc26x0_cc13x0_prcm.h.

◆ AON_WUC_BASE

#define AON_WUC_BASE 0x40091000

AON_WUC base address.

Definition at line 193 of file cc26x0_cc13x0_prcm.h.

◆ AUX_AIODIO0_BASE [1/2]

#define AUX_AIODIO0_BASE 0x400C1000

AUX_AIODIO0 base address.

Definition at line 45 of file cc26x0_cc13x0_aux.h.

◆ AUX_AIODIO0_BASE [2/2]

#define AUX_AIODIO0_BASE (PERIPH_BASE + 0xCC000)

AUX_AIODIO0 base address.

Definition at line 59 of file cc26x2_cc13x2_aux.h.

◆ AUX_AIODIO1_BASE

#define AUX_AIODIO1_BASE (PERIPH_BASE + 0xCD000)

AUX_AIODIO1 base address.

Definition at line 63 of file cc26x2_cc13x2_aux.h.

◆ AUX_AIODIO2_BASE

#define AUX_AIODIO2_BASE (PERIPH_BASE + 0xCE000)

AUX_AIODIO2 base address.

Definition at line 67 of file cc26x2_cc13x2_aux.h.

◆ AUX_AIODIO3_BASE

#define AUX_AIODIO3_BASE (PERIPH_BASE + 0xCF000)

AUX_AIODIO3 base address.

Definition at line 71 of file cc26x2_cc13x2_aux.h.

◆ AUX_ANAIF_BASE [1/2]

#define AUX_ANAIF_BASE 0x400C9000

AUX_WUC base address.

AUX_ANAIF base address.

Definition at line 219 of file cc26x0_cc13x0_aux.h.

◆ AUX_ANAIF_BASE [2/2]

#define AUX_ANAIF_BASE (PERIPH_BASE + 0xC9000)

AUX_ANAIF base address.

Definition at line 391 of file cc26x2_cc13x2_aux.h.

◆ AUX_EVCTL_BASE [1/2]

#define AUX_EVCTL_BASE 0x400C5000

AUX_EVCTL base address.

Definition at line 104 of file cc26x0_cc13x0_aux.h.

◆ AUX_EVCTL_BASE [2/2]

#define AUX_EVCTL_BASE (PERIPH_BASE + 0xC5000)

AUX_EVCTL base address.

Definition at line 162 of file cc26x2_cc13x2_aux.h.

◆ AUX_SMPH_BASE [1/2]

#define AUX_SMPH_BASE 0x400C8000

AUX_WUC base address.

AUX_SMPH base address.

Definition at line 198 of file cc26x0_cc13x0_aux.h.

◆ AUX_SMPH_BASE [2/2]

#define AUX_SMPH_BASE (PERIPH_BASE + 0xC8000)

AUX_SMPH base address.

Definition at line 356 of file cc26x2_cc13x2_aux.h.

◆ AUX_SYSIF_BASE

#define AUX_SYSIF_BASE (PERIPH_BASE + 0xC6000)

AUX_SYSIF base address.

Definition at line 237 of file cc26x2_cc13x2_aux.h.

◆ AUX_TDC_BASE [1/2]

#define AUX_TDC_BASE 0x400C4000

AUX_TDC base address.

Definition at line 72 of file cc26x0_cc13x0_aux.h.

◆ AUX_TDC_BASE [2/2]

#define AUX_TDC_BASE (PERIPH_BASE + 0xC4000)

AUX_TDC base address.

Definition at line 114 of file cc26x2_cc13x2_aux.h.

◆ AUX_TIMER01_BASE

#define AUX_TIMER01_BASE (PERIPH_BASE + 0xC7000)

AUX_TIMER01 base address.

Definition at line 281 of file cc26x2_cc13x2_aux.h.

◆ AUX_TIMER2_BASE

#define AUX_TIMER2_BASE (PERIPH_BASE + 0xC3000)

AUX_TIMER2 base address.

Definition at line 326 of file cc26x2_cc13x2_aux.h.

◆ AUX_TIMER_BASE

#define AUX_TIMER_BASE 0x400C7000

AUX_WUC base address.

Definition at line 174 of file cc26x0_cc13x0_aux.h.

◆ AUX_WUC_BASE

#define AUX_WUC_BASE 0x400C6000

AUX_WUC base address.

Definition at line 153 of file cc26x0_cc13x0_aux.h.

◆ CCFG_BASE

#define CCFG_BASE (0x50003000)

CCFG base address.

Definition at line 147 of file cc26xx_cc13xx_ccfg.h.

◆ DDI0_OSC_BASE

#define DDI0_OSC_BASE 0x400CA000

DDI0_OSC base address.

Definition at line 76 of file cc26x0_cc13x0_prcm.h.

◆ FCFG_BASE [1/2]

#define FCFG_BASE (0x50001000)

Base address of FCFG memory.

FCFG1 base address.

Definition at line 33 of file cc26x0_cc13x0_fcfg.h.

◆ FCFG_BASE [2/2]

#define FCFG_BASE (0x50001000)

FCFG1 base address.

Definition at line 147 of file cc26x2_cc13x2_fcfg.h.

◆ FLASH_BASE

#define FLASH_BASE 0x00000000

CMSIS includes.

FLASH base address

Definition at line 157 of file cc26xx_cc13xx.h.

◆ FLASH_BASEADDR

#define FLASH_BASEADDR (PERIPH_BASE + 0x30000)

FLASH base address.

Definition at line 192 of file cc26xx_cc13xx_vims.h.

◆ GPIO_BASE

#define GPIO_BASE (0x40022000)

GPIO base address.

Definition at line 31 of file cc26xx_cc13xx_gpio.h.

◆ I2C_BASE

#define I2C_BASE (PERIPH_BASE + 0x2000)

I2C base address.

Definition at line 192 of file cc26xx_cc13xx_i2c.h.

◆ MCU_IOC_BASE

#define MCU_IOC_BASE (0x40081000)

IOC (MCU) base address.

Definition at line 31 of file cc26xx_cc13xx_ioc.h.

◆ PERIPH_BASE

#define PERIPH_BASE 0x40000000

Peripheral base address.

Definition at line 158 of file cc26xx_cc13xx.h.

◆ PERIPH_BASE_NONBUF

#define PERIPH_BASE_NONBUF 0x60000000

Peripheral base address (nonbuf)

Definition at line 159 of file cc26xx_cc13xx.h.

◆ PRCM_BASE [1/2]

#define PRCM_BASE (PERIPH_BASE + 0x82000)

PRCM base address.

Definition at line 351 of file cc26x0_cc13x0_prcm.h.

◆ PRCM_BASE [2/2]

#define PRCM_BASE (PERIPH_BASE + 0x82000)

PRCM base address.

Definition at line 377 of file cc26x2_cc13x2_prcm.h.

◆ PRCM_BASE_NONBUF

#define PRCM_BASE_NONBUF (PERIPH_BASE_NONBUF + 0x82000)

PRCM base address (nonbuf)

Definition at line 378 of file cc26x2_cc13x2_prcm.h.

◆ RFC_DBELL_BASE

#define RFC_DBELL_BASE (PERIPH_BASE + 0x41000)

RFC_DBELL base address.

Definition at line 125 of file cc26xx_cc13xx_rfc.h.

◆ RFC_DBELL_BASE_NONBUF

#define RFC_DBELL_BASE_NONBUF (PERIPH_BASE_NONBUF + 0x41000)

RFC_DBELL base address.

Definition at line 126 of file cc26xx_cc13xx_rfc.h.

◆ RFC_PWR_BASE

#define RFC_PWR_BASE (PERIPH_BASE + 0x40000)

RFC_PWR base address.

Definition at line 159 of file cc26xx_cc13xx_rfc.h.

◆ RFC_PWR_BASE_NONBUF

#define RFC_PWR_BASE_NONBUF (PERIPH_BASE_NONBUF + 0x40000)

RFC_PWR base address.

Definition at line 160 of file cc26xx_cc13xx_rfc.h.

◆ ROM_API_TABLE

#define ROM_API_TABLE ((uint32_t *) 0x10000180)

ROM API table.

Definition at line 161 of file cc26xx_cc13xx.h.

◆ ROM_HARD_API_BASE

#define ROM_HARD_API_BASE 0x10000048

ROM Hard-API base address.

Definition at line 160 of file cc26xx_cc13xx.h.

◆ UART0_BASE

#define UART0_BASE (PERIPH_BASE + 0x1000)

UART0 base address.

Definition at line 127 of file cc26xx_cc13xx_uart.h.

◆ UART1_BASE

#define UART1_BASE (PERIPH_BASE + 0xB000)

UART1 base address.

Definition at line 128 of file cc26xx_cc13xx_uart.h.

◆ VIMS_BASE

#define VIMS_BASE (PERIPH_BASE + 0x34000)

VIMS base address.

Definition at line 215 of file cc26xx_cc13xx_vims.h.

◆ WDT_BASE

#define WDT_BASE 0x40080000

WDT base address.

Definition at line 47 of file cc26xx_cc13xx_wdt.h.