periph_cpu.h

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/*
 * Copyright (C) 2015 Freie Universität Berlin
 *               2015 Hamburg University of Applied Sciences
 *
 * This file is subject to the terms and conditions of the GNU Lesser
 * General Public License v2.1. See the file LICENSE in the top level
 * directory for more details.
 */
 
#ifndef PERIPH_CPU_H
#define PERIPH_CPU_H
 
#include "cpu.h"
 
#ifdef __cplusplus
extern "C" {
#endif
 
#ifndef DOXYGEN
#define HAVE_GPIO_T
typedef uint32_t gpio_t;
 
#define GPIO_UNDEF          (0xffffffff)
 
#define GPIO_PIN(x, y)      (((uint32_t)PIOA + (x << 9)) | y)
#endif /* DOXYGEN */
 
#define PERIPH_SPI_NEEDS_INIT_CS
#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
#define PERIPH_SPI_NEEDS_TRANSFER_REG
#define PERIPH_SPI_NEEDS_TRANSFER_REGS
#define CPUID_LEN           (16U)
 
#define TIMER_MAX_VAL       (0xffffffff)
 
#define TIMER_CHANNEL_NUMOF (1)
 
#define RTT_MAX_VALUE       (0xffffffff)
#define RTT_CLOCK_FREQUENCY (CHIP_FREQ_XTAL_32K)          /* in Hz */
#define RTT_MIN_FREQUENCY   (1) /* in Hz */
#define RTT_MAX_FREQUENCY   (RTT_CLOCK_FREQUENCY)         /* in Hz */
#define GPIO_MODE(io, pu, od)   (io | (pu << 1) | (od << 2))
 
#define ADC_NUMOF           (16U)
 
#define DAC_NUMOF           (2U)
 
#ifndef DOXYGEN
#define HAVE_GPIO_MODE_T
typedef enum {
    GPIO_IN    = GPIO_MODE(0, 0, 0),    
    GPIO_IN_PD = 0xf,                   
    GPIO_IN_PU = GPIO_MODE(0, 1, 0),    
    GPIO_OUT   = GPIO_MODE(1, 0, 0),    
    GPIO_OD    = GPIO_MODE(1, 0, 1),    
    GPIO_OD_PU = GPIO_MODE(1, 1, 1),    
} gpio_mode_t;
 
#define HAVE_GPIO_FLANK_T
typedef enum {
    GPIO_RISING = 1,        
    GPIO_FALLING = 2,       
    GPIO_BOTH = 3           
} gpio_flank_t;
#endif /* ndef DOXYGEN */
 
enum {
    PA = 0,                 
    PB = 1,                 
    PC = 2,                 
    PD = 3,                 
};
 
typedef enum {
    GPIO_MUX_A = 0,         
    GPIO_MUX_B = 1,         
} gpio_mux_t;
 
#ifndef DOXYGEN
#define HAVE_SPI_MODE_T
typedef enum {
    SPI_MODE_0 = (SPI_CSR_NCPHA),                   
    SPI_MODE_1 = (0),                               
    SPI_MODE_2 = (SPI_CSR_CPOL | SPI_CSR_NCPHA),    
    SPI_MODE_3 = (SPI_CSR_CPOL)                     
} spi_mode_t;
#define HAVE_SPI_CLK_T
typedef enum {
    SPI_CLK_100KHZ = (100000),                      
    SPI_CLK_400KHZ = (400000),                      
    SPI_CLK_1MHZ   = (1000000),                     
    SPI_CLK_5MHZ   = (5000000),                     
    SPI_CLK_10MHZ  = (10000000)                     
} spi_clk_t;
#endif /* ndef DOXYGEN */
 
#ifndef DOXYGEN
#define HAVE_ADC_RES_T
typedef enum {
    ADC_RES_6BIT  = 0x1,                    
    ADC_RES_8BIT  = 0x2,                    
    ADC_RES_10BIT = ADC_MR_LOWRES_BITS_10,  
    ADC_RES_12BIT = ADC_MR_LOWRES_BITS_12,  
    ADC_RES_14BIT = 0x4,                    
    ADC_RES_16BIT = 0x8                     
} adc_res_t;
#endif /* ndef DOXYGEN */
 
typedef struct {
    Tc *dev;                
    uint8_t id_ch0;         
} timer_conf_t;
 
typedef struct {
    Uart *dev;              
    gpio_t rx_pin;          
    gpio_t tx_pin;          
    gpio_mux_t mux;         
    uint8_t pmc_id;         
    uint8_t irqn;           
} uart_conf_t;
 
typedef struct {
    gpio_t pin;             
    uint8_t hwchan;         
} pwm_chan_conf_t;
 
typedef struct {
    Spi *dev;               
    uint8_t id;             
    gpio_t clk;             
    gpio_t mosi;            
    gpio_t miso;            
    gpio_mux_t mux;         
} spi_conf_t;
 
void gpio_init_mux(gpio_t pin, gpio_mux_t mux);
 
#ifdef __cplusplus
}
#endif
 
#endif /* PERIPH_CPU_H */