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periph_cpu.h File Reference

CPU specific definitions for internal peripheral handling. More...

Detailed Description

CPU specific definitions for internal peripheral handling.

Author
Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de
Tobias Fredersdorf tobia.nosp@m.s.fr.nosp@m.eders.nosp@m.dorf.nosp@m.@haw-.nosp@m.hamb.nosp@m.urg.d.nosp@m.e

Definition in file periph_cpu.h.

#include "cpu.h"
+ Include dependency graph for periph_cpu.h:

Go to the source code of this file.

Data Structures

struct  timer_conf_t
 Timer device configuration. More...
 
struct  uart_conf_t
 UART device configuration. More...
 
struct  pwm_chan_conf_t
 PWM channel configuration. More...
 
struct  spi_conf_t
 SPI device configuration. More...
 

Macros

#define CPUID_LEN   (16U)
 Length of the CPU_ID in octets.
 
#define TIMER_MAX_VAL   (0xffffffff)
 All SAM3 timers are 32-bit wide.
 
#define TIMER_CHANNEL_NUMOF   (1)
 We use one channel for each defined timer.
 
#define GPIO_MODE(io, pu, od)   (io | (pu << 1) | (od << 2))
 Generate GPIO mode bitfields.
 

RTT configuration

#define RTT_MAX_VALUE   (0xffffffff)
 
#define RTT_CLOCK_FREQUENCY   (CHIP_FREQ_XTAL_32K) /* in Hz */
 
#define RTT_MIN_FREQUENCY   (1) /* in Hz */
 
#define RTT_MAX_FREQUENCY   (RTT_CLOCK_FREQUENCY) /* in Hz */
 

ADC configuration, valid for all boards using this CPU

The sam3 has a fixed mapping of ADC pins and a fixed number of ADC channels, so this ADC configuration is valid for all boards using this CPU.

No need for any board specific configuration.

#define ADC_NUMOF   (16U)
 
#define DAC_NUMOF   (2U)
 DAC configuration, valid for all boards using this CPU.
 
enum  { PA = 0 , PB = 1 , PC = 2 , PD = 3 }
 Available ports on the SAM3X8E. More...
 
enum  gpio_mux_t { GPIO_MUX_A = 0 , GPIO_MUX_B = 1 }
 GPIO mux configuration. More...
 
void gpio_init_mux (gpio_t pin, gpio_mux_t mux)
 Configure the given GPIO pin to be used with the given MUX setting.
 

Macro Definition Documentation

◆ ADC_NUMOF

#define ADC_NUMOF   (16U)

Definition at line 97 of file periph_cpu.h.

◆ CPUID_LEN

#define CPUID_LEN   (16U)

Length of the CPU_ID in octets.

Definition at line 53 of file periph_cpu.h.

◆ DAC_NUMOF

#define DAC_NUMOF   (2U)

DAC configuration, valid for all boards using this CPU.

The sam3 has a fixed mapping of DAC pins and a fixed number of DAC channels, so this DAC configuration is valid for all boards using this CPU. No need for any board specific configuration.

The sam3's DAC channels are mapped to the following fixed pins:

  • line 0 (ch0): PB15
  • line 1 (ch1): PB16

Definition at line 110 of file periph_cpu.h.

◆ GPIO_MODE

#define GPIO_MODE (   io,
  pu,
  od 
)    (io | (pu << 1) | (od << 2))

Generate GPIO mode bitfields.

We use 3 bit to determine the pin functions:

  • bit 0: in/out
  • bit 1: PU enable
  • bit 2: OD enable

Definition at line 88 of file periph_cpu.h.

◆ PERIPH_SPI_NEEDS_INIT_CS

#define PERIPH_SPI_NEEDS_INIT_CS

Definition at line 44 of file periph_cpu.h.

◆ PERIPH_SPI_NEEDS_TRANSFER_BYTE

#define PERIPH_SPI_NEEDS_TRANSFER_BYTE

Definition at line 45 of file periph_cpu.h.

◆ PERIPH_SPI_NEEDS_TRANSFER_REG

#define PERIPH_SPI_NEEDS_TRANSFER_REG

Definition at line 46 of file periph_cpu.h.

◆ PERIPH_SPI_NEEDS_TRANSFER_REGS

#define PERIPH_SPI_NEEDS_TRANSFER_REGS

Definition at line 47 of file periph_cpu.h.

◆ RTT_CLOCK_FREQUENCY

#define RTT_CLOCK_FREQUENCY   (CHIP_FREQ_XTAL_32K) /* in Hz */

Definition at line 75 of file periph_cpu.h.

◆ RTT_MAX_FREQUENCY

#define RTT_MAX_FREQUENCY   (RTT_CLOCK_FREQUENCY) /* in Hz */

Definition at line 77 of file periph_cpu.h.

◆ RTT_MAX_VALUE

#define RTT_MAX_VALUE   (0xffffffff)

Definition at line 74 of file periph_cpu.h.

◆ RTT_MIN_FREQUENCY

#define RTT_MIN_FREQUENCY   (1) /* in Hz */

Definition at line 76 of file periph_cpu.h.

◆ TIMER_CHANNEL_NUMOF

#define TIMER_CHANNEL_NUMOF   (1)

We use one channel for each defined timer.

While the peripheral provides three channels, the current interrupt flag handling leads to a race condition where calling timer_clear() on one channel can disable a pending flag for other channels. Until resolved, limit the peripheral to only one channel.

Definition at line 68 of file periph_cpu.h.

◆ TIMER_MAX_VAL

#define TIMER_MAX_VAL   (0xffffffff)

All SAM3 timers are 32-bit wide.

Definition at line 58 of file periph_cpu.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Available ports on the SAM3X8E.

Enumerator
PA 

port A

PB 

port B

PC 

port C

PD 

port D

Definition at line 134 of file periph_cpu.h.

◆ gpio_mux_t

enum gpio_mux_t

GPIO mux configuration.

Enumerator
GPIO_MUX_A 

alternate function A

GPIO_MUX_B 

alternate function B

Definition at line 144 of file periph_cpu.h.

Function Documentation

◆ gpio_init_mux()

void gpio_init_mux ( gpio_t  pin,
gpio_mux_t  mux 
)

Configure the given GPIO pin to be used with the given MUX setting.

Parameters
[in]pinGPIO pin to configure
[in]muxMUX setting to use