19#ifndef CONFIG_BOARD_HAS_LSE
20#define CONFIG_BOARD_HAS_LSE 1
24#ifndef CONFIG_BOARD_HAS_HSE
25#define CONFIG_BOARD_HAS_HSE 1
28#include "periph_cpu.h"
31#include "cfg_rtt_default.h"
55#define DMA_0_ISR isr_dma1_stream4
56#define DMA_1_ISR isr_dma2_stream6
57#define DMA_2_ISR isr_dma1_stream6
59#define DMA_3_ISR isr_dma2_stream2
60#define DMA_4_ISR isr_dma2_stream5
61#define DMA_5_ISR isr_dma2_stream3
62#define DMA_6_ISR isr_dma2_stream4
64#define DMA_7_ISR isr_dma2_stream0
66#define DMA_NUMOF ARRAY_SIZE(dma_config)
76 .rcc_mask = RCC_APB2ENR_TIM1EN,
86 .rcc_mask = RCC_APB1ENR_TIM4EN,
96#define PWM_NUMOF ARRAY_SIZE(pwm_config)
106 .rcc_mask = RCC_APB1ENR_USART3EN,
113#ifdef MODULE_PERIPH_DMA
120 .rcc_mask = RCC_APB2ENR_USART6EN,
127#ifdef MODULE_PERIPH_DMA
134 .rcc_mask = RCC_APB1ENR_USART2EN,
141#ifdef MODULE_PERIPH_DMA
148#define UART_0_ISR (isr_usart3)
149#define UART_1_ISR (isr_usart6)
150#define UART_2_ISR (isr_usart2)
152#define UART_NUMOF ARRAY_SIZE(uart_config)
167#ifdef MODULE_PERIPH_ETH
179 .rccmask = RCC_APB2ENR_SPI1EN,
181#ifdef MODULE_PERIPH_DMA
198 .rccmask = RCC_APB2ENR_SPI4EN,
200#ifdef MODULE_PERIPH_DMA
209#define SPI_NUMOF ARRAY_SIZE(spi_config)
235#define ETH_DMA_ISR isr_dma2_stream0
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Common configuration for STM32 I2C.
Common configuration for STM32 Timer peripheral based on TIM2.
Common configuration for STM32 OTG FS peripheral.
@ RMII
Configuration for RMII.
@ GPIO_AF1
use alternate function 1
@ GPIO_AF2
use alternate function 2
@ GPIO_AF5
use alternate function 5
@ GPIO_AF8
use alternate function 8
@ GPIO_AF7
use alternate function 7
#define SPI_CS_UNDEF
Define value for unused CS line.
@ APB1
Advanced Peripheral Bus 1.
@ APB2
Advanced Peripheral Bus 2.
#define MII_BMCR_FULL_DPLX
Set for full duplex.
#define MII_BMCR_SPEED_100
Set speed to 100 Mbps.
Interface definition for MII/RMII h.
Ethernet Peripheral configuration.
PWM device configuration.
SPI device configuration.
UART device configuration.