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periph_conf.h File Reference

Peripheral MCU configuration for the nucleo-h753zi board. More...

Detailed Description

Peripheral MCU configuration for the nucleo-h753zi board.

Author
Joshua DeWeese jdewe.nosp@m.ese@.nosp@m.prime.nosp@m.cont.nosp@m.rols..nosp@m.com

Definition in file periph_conf.h.

#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_i2c1_pb8_pb9.h"
#include "cfg_timer_tim5_and_tim2.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

#define CONFIG_BOARD_HAS_LSE   1
 
#define CONFIG_BOARD_HAS_HSE   1
 

DMA configuration

Note
STM32H7 peripherals (D2 domain) use DMA1/DMA2.
#define DMA_0_ISR   isr_dma1_stream4
 
#define DMA_1_ISR   isr_dma2_stream6
 
#define DMA_2_ISR   isr_dma1_stream6
 
#define DMA_NUMOF   ARRAY_SIZE(dma_config)
 
static const dma_conf_t dma_config []
 

UART configuration

Note
STM32H753ZI uses APB1L/APB2 buses (D2 Domain)
#define UART_0_ISR   (isr_usart3)
 
#define UART_1_ISR   (isr_usart6)
 
#define UART_2_ISR   (isr_usart2)
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

SPI configuration

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const spi_conf_t spi_config []
 

ADC configuration

Note
STM32H7 ADC is 16-bit, and uses independent clocks
#define VBAT_ADC   ADC_LINE(6)
 ADC line for internal VBAT channel.
 
#define ADC_NUMOF   ARRAY_SIZE(adc_config)
 
static const adc_conf_t adc_config []
 

PWM configuration

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)
 
static const pwm_conf_t pwm_config []
 

Macro Definition Documentation

◆ ADC_NUMOF

#define ADC_NUMOF   ARRAY_SIZE(adc_config)

Definition at line 163 of file periph_conf.h.

◆ CONFIG_BOARD_HAS_HSE

#define CONFIG_BOARD_HAS_HSE   1

Definition at line 23 of file periph_conf.h.

◆ CONFIG_BOARD_HAS_LSE

#define CONFIG_BOARD_HAS_LSE   1

Definition at line 19 of file periph_conf.h.

◆ DMA_0_ISR

#define DMA_0_ISR   isr_dma1_stream4

Definition at line 46 of file periph_conf.h.

◆ DMA_1_ISR

#define DMA_1_ISR   isr_dma2_stream6

Definition at line 47 of file periph_conf.h.

◆ DMA_2_ISR

#define DMA_2_ISR   isr_dma1_stream6

Definition at line 48 of file periph_conf.h.

◆ DMA_NUMOF

#define DMA_NUMOF   ARRAY_SIZE(dma_config)

Definition at line 50 of file periph_conf.h.

◆ PWM_NUMOF

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)

Definition at line 192 of file periph_conf.h.

◆ SPI_NUMOF

#define SPI_NUMOF   ARRAY_SIZE(spi_config)

Definition at line 141 of file periph_conf.h.

◆ UART_0_ISR

#define UART_0_ISR   (isr_usart3)

Definition at line 103 of file periph_conf.h.

◆ UART_1_ISR

#define UART_1_ISR   (isr_usart6)

Definition at line 104 of file periph_conf.h.

◆ UART_2_ISR

#define UART_2_ISR   (isr_usart2)

Definition at line 105 of file periph_conf.h.

◆ UART_NUMOF

#define UART_NUMOF   ARRAY_SIZE(uart_config)

Definition at line 106 of file periph_conf.h.

◆ VBAT_ADC

#define VBAT_ADC   ADC_LINE(6)

ADC line for internal VBAT channel.

Definition at line 162 of file periph_conf.h.

Variable Documentation

◆ adc_config

const adc_conf_t adc_config[]
static
Initial value:
= {
{GPIO_PIN(PORT_A, 3), 0, 15},
{GPIO_PIN(PORT_C, 0), 1, 10},
{GPIO_PIN(PORT_C, 3), 0, 13},
{GPIO_PIN(PORT_B, 1), 1, 5},
{GPIO_PIN(PORT_C, 2), 0, 12},
{GPIO_PIN(PORT_F, 10), 2, 6},
{GPIO_UNDEF, 2, 17},
}
@ PORT_B
port B
Definition periph_cpu.h:44
@ PORT_C
port C
Definition periph_cpu.h:45
@ PORT_F
port F
Definition periph_cpu.h:48
@ PORT_A
port A
Definition periph_cpu.h:43
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:42
#define GPIO_UNDEF
Definition of a fitting UNDEF value.

Definition at line 149 of file periph_conf.h.

◆ dma_config

const dma_conf_t dma_config[]
static
Initial value:
= {
{ .stream = 4 },
{ .stream = 14 },
{ .stream = 6 },
}

Definition at line 40 of file periph_conf.h.

◆ pwm_config

const pwm_conf_t pwm_config[]
static
Initial value:
= {
{
.dev = TIM1,
.rcc_mask = RCC_APB2ENR_TIM1EN,
.chan = { { .pin = GPIO_PIN(PORT_E, 9), .cc_chan = 0},
{ .pin = GPIO_PIN(PORT_E, 11), .cc_chan = 1},
{ .pin = GPIO_PIN(PORT_E, 13), .cc_chan = 2},
{ .pin = GPIO_PIN(PORT_E, 14), .cc_chan = 3} },
.af = GPIO_AF1,
.bus = APB2
},
{
.dev = TIM4,
.rcc_mask = RCC_APB1LENR_TIM4EN,
.chan = { { .pin = GPIO_PIN(PORT_D, 12), .cc_chan = 0},
{ .pin = GPIO_PIN(PORT_D, 13), .cc_chan = 1},
{ .pin = GPIO_PIN(PORT_D, 14), .cc_chan = 2},
{ .pin = GPIO_PIN(PORT_D, 15), .cc_chan = 3} },
.af = GPIO_AF2,
.bus = APB1
},
}
@ PORT_E
port E
Definition periph_cpu.h:47
@ PORT_D
port D
Definition periph_cpu.h:46
@ GPIO_AF1
use alternate function 1
Definition cpu_gpio.h:99
@ GPIO_AF2
use alternate function 2
Definition cpu_gpio.h:100
@ APB1
Advanced Peripheral Bus 1.
Definition periph_cpu.h:75
@ APB2
Advanced Peripheral Bus 2.
Definition periph_cpu.h:76

Definition at line 170 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_B, 5),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_A, 4),
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
{
.dev = SPI4,
.mosi_pin = GPIO_PIN(PORT_E, 6),
.miso_pin = GPIO_PIN(PORT_E, 5),
.sclk_pin = GPIO_PIN(PORT_E, 2),
.cs_pin = GPIO_PIN(PORT_E, 4),
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI4EN,
.apbbus = APB2
}
}
@ GPIO_AF5
use alternate function 5
Definition cpu_gpio.h:103

Definition at line 113 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static

Definition at line 58 of file periph_conf.h.