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periph_conf_common.h
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1/*
2 * Copyright (C) 2014 Freie Universität Berlin
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser General
5 * Public License v2.1. See the file LICENSE in the top level directory for more
6 * details.
7 */
8
20#ifndef PERIPH_CONF_COMMON_H
21#define PERIPH_CONF_COMMON_H
22
23/* iotlab boards provide an LSE */
24#ifndef CONFIG_BOARD_HAS_LSE
25#define CONFIG_BOARD_HAS_LSE 1
26#endif
27
28/* HSE is clocked at 16MHz */
29#ifndef CONFIG_BOARD_HAS_HSE
30#define CONFIG_BOARD_HAS_HSE 1
31#endif
32
33#ifndef CONFIG_CLOCK_HSE
34#define CONFIG_CLOCK_HSE MHZ(16)
35#endif
36
37#include "periph_cpu.h"
38#include "clk_conf.h"
39
40#ifdef __cplusplus
41extern "C" {
42#endif
43
48static const adc_conf_t adc_config[] = {
49 { GPIO_PIN(PORT_A,3), 0, 3 },
50 { GPIO_UNDEF , 0, 16 },
51 { GPIO_UNDEF , 0, 17 }
52};
53
54#define ADC_NUMOF ARRAY_SIZE(adc_config)
61static const dma_conf_t dma_config[] = {
62 { .stream = 3 }, /* DMA1 Channel 4 - USART1_TX */
63 { .stream = 5 }, /* DMA1 Channel 6 - USART2_TX */
64};
65
66#define DMA_0_ISR isr_dma1_channel4
67#define DMA_1_ISR isr_dma1_channel6
68
69#define DMA_NUMOF ARRAY_SIZE(dma_config)
76static const timer_conf_t timer_config[] = {
77 {
78 .dev = TIM2,
79 .max = 0x0000ffff,
80 .rcc_mask = RCC_APB1ENR_TIM2EN,
81 .bus = APB1,
82 .irqn = TIM2_IRQn
83 },
84 {
85 .dev = TIM3,
86 .max = 0x0000ffff,
87 .rcc_mask = RCC_APB1ENR_TIM3EN,
88 .bus = APB1,
89 .irqn = TIM3_IRQn
90 }
91};
92
93#define TIMER_0_ISR isr_tim2
94#define TIMER_1_ISR isr_tim3
95
96#define TIMER_NUMOF ARRAY_SIZE(timer_config)
103static const uart_conf_t uart_config[] = {
104 {
105 .dev = USART1,
106 .rcc_mask = RCC_APB2ENR_USART1EN,
107 .rx_pin = GPIO_PIN(PORT_A, 10),
108 .tx_pin = GPIO_PIN(PORT_A, 9),
109 .bus = APB2,
110 .irqn = USART1_IRQn,
111#ifdef MODULE_PERIPH_DMA
112 .dma = 0,
113 .dma_chan = 2
114#endif
115 },
116 {
117 .dev = USART2,
118 .rcc_mask = RCC_APB1ENR_USART2EN,
119 .rx_pin = GPIO_PIN(PORT_A, 3),
120 .tx_pin = GPIO_PIN(PORT_A, 2),
121 .bus = APB1,
122 .irqn = USART2_IRQn,
123#ifdef MODULE_PERIPH_DMA
124 .dma = 1,
125 .dma_chan = 2
126#endif
127 }
128};
129
130#define UART_0_ISR (isr_usart1)
131#define UART_1_ISR (isr_usart2)
132
133#define UART_NUMOF ARRAY_SIZE(uart_config)
140#ifndef RTT_FREQUENCY
141#define RTT_FREQUENCY (RTT_MAX_FREQUENCY) /* in Hz */
142#endif
149static const i2c_conf_t i2c_config[] = {
150 {
151 .dev = I2C1,
152 .speed = I2C_SPEED_NORMAL,
153 .scl_pin = GPIO_PIN(PORT_B, 6),
154 .sda_pin = GPIO_PIN(PORT_B, 7),
155 .bus = APB1,
156 .rcc_mask = RCC_APB1ENR_I2C1EN,
157 .clk = CLOCK_APB1,
158 .irqn = I2C1_EV_IRQn
159 }
160};
161
162#define I2C_0_ISR isr_i2c1_ev
163
164#define I2C_NUMOF ARRAY_SIZE(i2c_config)
167#ifdef __cplusplus
168}
169#endif
170
171#endif /* PERIPH_CONF_COMMON_H */
@ PORT_B
port B
Definition periph_cpu.h:48
@ PORT_A
port A
Definition periph_cpu.h:47
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:278
static const uart_conf_t uart_config[]
Static array with configuration for declared UART devices.
@ APB1
Advanced Peripheral Bus 1
Definition periph_cpu.h:79
@ APB2
Advanced Peripheral Bus 2
Definition periph_cpu.h:80
ADC device configuration.
Definition periph_cpu.h:379
DMA configuration.
Definition cpu_dma.h:32
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
Definition cpu_dma.h:55
I2C configuration structure.
Definition periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition periph_cpu.h:300
Timer device configuration.
Definition periph_cpu.h:264
TC0_t * dev
Pointer to the used as Timer device.
Definition periph_cpu.h:265
UART device configuration.
Definition periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:219