Peripheral MCU configuration for the nucleo-f070rb board.
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#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_i2c1_pb8_pb9.h"
Go to the source code of this file.
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To find appriopate device and pins find in the MCU datasheet table concerning "Alternate function AF0 to AF7" a texts similar to SPI[X]_MOSI/_MISO/_SCK where SPI[X] is SPI device.
For nucleo-f070rb this information is in the datasheet, Tables 11, 12 and 13, page 30.
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#define | SPI_NUMOF ARRAY_SIZE(spi_config) |
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static const spi_conf_t | spi_config [] |
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◆ ADC_NUMOF
◆ CONFIG_BOARD_HAS_HSE
#define CONFIG_BOARD_HAS_HSE 1 |
◆ CONFIG_BOARD_HAS_LSE
#define CONFIG_BOARD_HAS_LSE 1 |
◆ DMA_NUMOF
◆ DMA_SHARED_ISR_0
#define DMA_SHARED_ISR_0 isr_dma1_ch2_3_dma2_ch1_2 |
◆ DMA_SHARED_ISR_0_STREAMS
#define DMA_SHARED_ISR_0_STREAMS { 0, 1 } /* Indexes 0 and 1 of dma_config share the same isr */ |
◆ PWM_NUMOF
◆ SPI_NUMOF
◆ TIMER_0_ISR
#define TIMER_0_ISR isr_tim1_cc |
◆ TIMER_NUMOF
◆ UART_0_ISR
#define UART_0_ISR (isr_usart2) |
◆ UART_1_ISR
#define UART_1_ISR (isr_usart1) |
◆ UART_2_ISR
#define UART_2_ISR (isr_usart3_8) |
◆ UART_NUMOF
◆ adc_config
Initial value:= {
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition at line 154 of file periph_conf.h.
◆ dma_config
Initial value:= {
{ .stream = 1 },
{ .stream = 2 },
}
Definition at line 109 of file periph_conf.h.
◆ pwm_config
Initial value:= {
{
.dev = TIM3,
.rcc_mask = RCC_APB1ENR_TIM3EN,
},
{
.dev = TIM15,
.rcc_mask = RCC_APB2ENR_TIM15EN,
}
}
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ GPIO_AF1
use alternate function 1
@ APB1
Advanced Peripheral Bus 1
@ APB2
Advanced Peripheral Bus 2
Definition at line 124 of file periph_conf.h.
◆ spi_config
Initial value:= {
{
.dev = SPI1,
.rccmask = RCC_APB2ENR_SPI1EN,
}
}
@ GPIO_AF0
use alternate function 0
Definition at line 177 of file periph_conf.h.
◆ timer_config
Initial value:= {
{
.dev = TIM1,
.max = 0x0000ffff,
.rcc_mask = RCC_APB2ENR_TIM1EN,
.irqn = TIM1_CC_IRQn
}
}
Definition at line 46 of file periph_conf.h.
◆ uart_config