periph_conf.h

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/*
 * SPDX-FileCopyrightText: 2018 Inria
 * SPDX-License-Identifier: LGPL-2.1-only
 */
 
#pragma once

 
/* Add specific clock configuration (HSE, LSE) for this board here */
#ifndef CONFIG_BOARD_HAS_LSE
#define CONFIG_BOARD_HAS_LSE            1
#endif
 
#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_rtt_default.h"
#include "cfg_usb_otg_fs.h"
 
#ifdef __cplusplus
extern "C" {
#endif

static const timer_conf_t timer_config[] = {
    {
        .dev      = TIM5,
        .max      = 0xffffffff,
        .rcc_mask = RCC_APB1ENR1_TIM5EN,
        .bus      = APB1,
        .irqn     = TIM5_IRQn
    }
};
 
#define TIMER_0_ISR         isr_tim5
 
#define TIMER_NUMOF         ARRAY_SIZE(timer_config)

static const uart_conf_t uart_config[] = {
    {
        .dev        = USART2,
        .rcc_mask   = RCC_APB1ENR1_USART2EN,
        .rx_pin     = GPIO_PIN(PORT_D, 6),
        .tx_pin     = GPIO_PIN(PORT_D, 5),
        .rx_af      = GPIO_AF7,
        .tx_af      = GPIO_AF7,
        .bus        = APB1,
        .irqn       = USART2_IRQn,
        .type       = STM32_USART,
        .clk_src    = 0, /* Use APB clock */
#ifdef UART_USE_DMA
        .dma_stream = 6,
        .dma_chan   = 4
#endif
    }
};
 
#define UART_0_ISR          (isr_usart2)
 
#define UART_NUMOF          ARRAY_SIZE(uart_config)

static const adc_conf_t adc_config[] = {
    {GPIO_PIN(PORT_A, 0), 0, 5},  /*< ADC12_IN5  */
    {GPIO_PIN(PORT_A, 5), 0, 10}, /*< ADC12_IN10 */
    {GPIO_PIN(PORT_A, 1), 0, 6},  /*< ADC12_IN6  */
    {GPIO_PIN(PORT_A, 2), 0, 7},  /*< ADC12_IN7  */
    {GPIO_PIN(PORT_A, 3), 0, 8},  /*< ADC12_IN8  */
    {GPIO_UNDEF, 0, 18}, /* VBAT */
};

#define VBAT_ADC            ADC_LINE(5)

#define ADC_NUMOF           ARRAY_SIZE(adc_config)

static const pwm_conf_t pwm_config[] = {
    {
        .dev      = TIM2,
        .rcc_mask = RCC_APB1ENR1_TIM2EN,
        .chan     = { { .pin = GPIO_PIN(PORT_A, 5), .cc_chan = 0},
                      { .pin = GPIO_PIN(PORT_A, 1), .cc_chan = 1},
                      { .pin = GPIO_PIN(PORT_A, 2), .cc_chan = 2},
                      { .pin = GPIO_PIN(PORT_A, 3), .cc_chan = 3} },
        .af       = GPIO_AF1,
        .bus      = APB1
    },
    {
        .dev      = TIM1,
        .rcc_mask = RCC_APB2ENR_TIM1EN,
        .chan     = { { .pin = GPIO_PIN(PORT_E, 11), .cc_chan = 1},
                      { .pin = GPIO_PIN(PORT_E, 13), .cc_chan = 2},
                      { .pin = GPIO_PIN(PORT_E, 14), .cc_chan = 3},
                      { .pin = GPIO_UNDEF,           .cc_chan = 0} },
        .af       = GPIO_AF1,
        .bus      = APB2
    }
};
 
#define PWM_NUMOF           ARRAY_SIZE(pwm_config)
 
#ifdef __cplusplus
}
#endif