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periph_conf.h File Reference

Peripheral MCU configuration for the p-nucleo-wb55 board. More...

Detailed Description

Peripheral MCU configuration for the p-nucleo-wb55 board.

Author
Francisco Molina franc.nosp@m.ois-.nosp@m.xavie.nosp@m.r.mo.nosp@m.lina@.nosp@m.inri.nosp@m.a.fr

Definition in file periph_conf.h.

#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_i2c1_pb8_pb9.h"
#include "cfg_rtt_default.h"
#include "cfg_timer_tim2.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

Macros

#define USBDEV_ISR   isr_usb_lp
 Interrupt function name mapping.
 
#define USBDEV_NUMOF   ARRAY_SIZE(stm32_usbdev_fs_config)
 Number of available USB device FS peripherals.
 

Variables

static const stm32_usbdev_fs_config_t stm32_usbdev_fs_config []
 USB device FS configuration.
 
#define CONFIG_BOARD_HAS_LSE   1
 
#define CONFIG_BOARD_HAS_HSE   1
 
#define CONFIG_CLOCK_HSE   MHZ(32)
 
#define CLOCK_EXTAHB_DIV   RCC_EXTCFGR_C2HPRE_3
 
#define CLOCK_EXTAHB   (CLOCK_CORECLOCK / 2)
 

UART configuration

#define UART_0_ISR   (isr_usart1)
 
#define UART_1_ISR   (isr_lpuart1)
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

SPI configuration

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const spi_conf_t spi_config []
 

PWM configuration

To find appriopate device and channel find in the MCU datasheet table concerning "Alternate function AF0 to AF7" a text similar to TIM[X]_CH[Y], where: TIM[X] - is device, [Y] - describes used channel (indexed from 0), for example TIM2_CH1 is channel 0 in configuration structure (cc_chan - field), Port column in the table describes connected port.

For Nucleo-WB55 this information is in the datasheet, Table 18, page 72.

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)
 
static const pwm_conf_t pwm_config []
 

Macro Definition Documentation

◆ CLOCK_EXTAHB

#define CLOCK_EXTAHB   (CLOCK_CORECLOCK / 2)

Definition at line 37 of file periph_conf.h.

◆ CLOCK_EXTAHB_DIV

#define CLOCK_EXTAHB_DIV   RCC_EXTCFGR_C2HPRE_3

Definition at line 36 of file periph_conf.h.

◆ CONFIG_BOARD_HAS_HSE

#define CONFIG_BOARD_HAS_HSE   1

Definition at line 28 of file periph_conf.h.

◆ CONFIG_BOARD_HAS_LSE

#define CONFIG_BOARD_HAS_LSE   1

Definition at line 24 of file periph_conf.h.

◆ CONFIG_CLOCK_HSE

#define CONFIG_CLOCK_HSE   MHZ(32)

Definition at line 32 of file periph_conf.h.

◆ PWM_NUMOF

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)

Definition at line 137 of file periph_conf.h.

◆ SPI_NUMOF

#define SPI_NUMOF   ARRAY_SIZE(spi_config)

Definition at line 106 of file periph_conf.h.

◆ UART_0_ISR

#define UART_0_ISR   (isr_usart1)

Definition at line 80 of file periph_conf.h.

◆ UART_1_ISR

#define UART_1_ISR   (isr_lpuart1)

Definition at line 81 of file periph_conf.h.

◆ UART_NUMOF

#define UART_NUMOF   ARRAY_SIZE(uart_config)

Definition at line 83 of file periph_conf.h.

◆ USBDEV_ISR

#define USBDEV_ISR   isr_usb_lp

Interrupt function name mapping.

Definition at line 160 of file periph_conf.h.

◆ USBDEV_NUMOF

#define USBDEV_NUMOF   ARRAY_SIZE(stm32_usbdev_fs_config)

Number of available USB device FS peripherals.

Definition at line 165 of file periph_conf.h.

Variable Documentation

◆ pwm_config

const pwm_conf_t pwm_config[]
static
Initial value:
= {
{
.dev = TIM1,
.rcc_mask = RCC_APB2ENR_TIM1EN,
.chan = { { .pin = GPIO_PIN(PORT_A, 8) , .cc_chan = 0},
{ .pin = GPIO_PIN(PORT_A, 9) , .cc_chan = 1},
{ .pin = GPIO_PIN(PORT_A, 10) , .cc_chan = 2},
{ .pin = GPIO_PIN(PORT_A, 11) , .cc_chan = 3} },
.af = GPIO_AF1,
.bus = APB2
},
}
@ PORT_A
port A
Definition periph_cpu.h:47
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
@ GPIO_AF1
use alternate function 1
Definition cpu_gpio.h:103
@ APB2
Advanced Peripheral Bus 2
Definition periph_cpu.h:80

Definition at line 124 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
}
}
@ GPIO_AF5
use alternate function 5
Definition cpu_gpio.h:107
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition periph_cpu.h:363

Definition at line 90 of file periph_conf.h.

◆ stm32_usbdev_fs_config

const stm32_usbdev_fs_config_t stm32_usbdev_fs_config[]
static
Initial value:
= {
{
.base_addr = (uintptr_t)USB,
.rcc_mask = RCC_APB1ENR1_USBEN | RCC_APB1ENR1_CRSEN,
.irqn = USB_LP_IRQn,
.apb = APB1,
.dm = GPIO_PIN(PORT_A, 11),
.dp = GPIO_PIN(PORT_A, 12),
.af = GPIO_AF10,
.disconn = GPIO_UNDEF,
},
}
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ GPIO_AF10
use alternate function 10
Definition cpu_gpio.h:113
@ APB1
Advanced Peripheral Bus 1
Definition periph_cpu.h:79

USB device FS configuration.

Definition at line 144 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static
Initial value:
= {
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_B, 7),
.tx_pin = GPIO_PIN(PORT_B, 6),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB2,
.irqn = USART1_IRQn,
.type = STM32_USART,
.clk_src = 0,
},
{
.dev = LPUART1,
.rcc_mask = RCC_APB1ENR2_LPUART1EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF8,
.tx_af = GPIO_AF8,
.bus = APB12,
.irqn = LPUART1_IRQn,
.type = STM32_LPUART,
.clk_src = 0,
},
}
@ PORT_B
port B
Definition periph_cpu.h:48
@ GPIO_AF8
use alternate function 8
Definition cpu_gpio.h:111
@ GPIO_AF7
use alternate function 7
Definition cpu_gpio.h:109
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition cpu_uart.h:39
@ STM32_USART
STM32 USART module type.
Definition cpu_uart.h:38

Definition at line 53 of file periph_conf.h.