23#ifndef CONFIG_BOARD_HAS_LSE
24#define CONFIG_BOARD_HAS_LSE 1
28#ifndef CONFIG_BOARD_HAS_HSE
29#define CONFIG_BOARD_HAS_HSE 1
33#ifndef CONFIG_CLOCK_HSE
34#define CONFIG_CLOCK_HSE MHZ(25)
37#include "periph_cpu.h"
39#include "cfg_rtt_default.h"
40#if defined(MODULE_PERIPH_USBDEV_HS_UTMI)
59 .rcc_mask = RCC_APB1ENR_TIM2EN,
65#define TIMER_0_ISR isr_tim2
67#define TIMER_NUMOF ARRAY_SIZE(timer_config)
77 .rcc_mask = RCC_APB2ENR_USART6EN,
84#ifdef MODULE_PERIPH_UART_HW_FC
93 .rcc_mask = RCC_APB1ENR_USART2EN,
100#ifdef MODULE_PERIPH_UART_HW_FC
109 .rcc_mask = RCC_APB1ENR_UART7EN,
116#ifdef MODULE_PERIPH_UART_HW_FC
125 .rcc_mask = RCC_APB1ENR_UART5EN,
132#ifdef MODULE_PERIPH_UART_HW_FC
141#define UART_0_ISR (isr_usart6)
142#define UART_1_ISR (isr_usart2)
143#define UART_2_ISR (isr_uart4)
144#define UART_3_ISR (isr_uart7)
145#define UART_4_ISR (isr_uart5)
147#define UART_NUMOF ARRAY_SIZE(uart_config)
163 .rcc_mask = RCC_APB1ENR_I2C2EN,
164 .rcc_sw_mask = RCC_DCKCFGR2_I2C2SEL_1,
165 .irqn = I2C2_ER_IRQn,
175 .rcc_mask = RCC_APB1ENR_I2C3EN,
176 .rcc_sw_mask = RCC_DCKCFGR2_I2C3SEL_1,
177 .irqn = I2C3_ER_IRQn,
187 .rcc_mask = RCC_APB1ENR_I2C1EN,
188 .rcc_sw_mask = RCC_DCKCFGR2_I2C1SEL_1,
189 .irqn = I2C1_ER_IRQn,
193#define I2C_0_ISR isr_i2c2_er
194#define I2C_1_ISR isr_i2c3_er
195#define I2C_2_ISR isr_i2c1_er
197#define I2C_NUMOF ARRAY_SIZE(i2c_config)
215 .rccmask = RCC_APB2ENR_SPI1EN,
228 .rccmask = RCC_APB1ENR_SPI2EN,
233#define SPI_NUMOF ARRAY_SIZE(spi_config)
246 .rcc_mask = RCC_AHB3ENR_FMCEN,
247#if MODULE_PERIPH_FMC_NOR_SRAM
282#if MODULE_PERIPH_FMC_16BIT
317 .address = 0x60000000,
324 .r_timing = { .addr_setup = 13,
326 .bus_turnaround = 3, },
335 .address = 0x64000000,
347 .r_timing = { .addr_setup = 2,
349 .bus_turnaround = 5, },
357#define FMC_BANK_NUMOF ARRAY_SIZE(fmc_bank_config)
377#define LCD_FMC_NUMOF 1
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
static const fmc_bank_conf_t fmc_bank_config[]
FMC Bank configuration.
static const fmc_conf_t fmc_config
FMC controller configuration.
static const lcd_fmc_desc_t lcd_fmc_desc[]
Descriptors of FMC banks used for LCDs.
Common configuration for STM32 OTG FS peripheral.
Common configuration for STM32 OTG HS peripheral with internal UTMI HS PHY.
@ GPIO_AF5
use alternate function 5
@ GPIO_AF4
use alternate function 4
@ GPIO_AF8
use alternate function 8
@ GPIO_AF12
use alternate function 12
@ GPIO_AF7
use alternate function 7
#define SPI_CS_UNDEF
Define value for unused CS line.
@ APB1
Advanced Peripheral Bus 1
@ APB2
Advanced Peripheral Bus 2
#define FMC_BANK_CONFIG(n)
Gives the configuration of n-th bank.
@ FMC_BUS_WIDTH_16BIT
16 bit data bus width
@ FMC_BANK_1
Bank 1 is always available and used for NOR, PSRAM, SRAM.
Bank configuration structure.
FMC peripheral configuration.
I2C configuration structure.
TWI_t * dev
Pointer to hardware module registers.
Descriptor of the FMC bank used for a LCD.
const fmc_bank_conf_t * bank
FMC bank config used for the LCD.
SPI device configuration.
SPI_t * dev
pointer to the used SPI device
Timer device configuration.
TC0_t * dev
Pointer to the used as Timer device.
UART device configuration.
USART_t * dev
pointer to the used UART device
#define KiB(x)
A macro to return the bytes in x KiB.