FMC peripheral configuration. More...

Detailed Description

FMC peripheral configuration.

The GPIOs are defined depending on used memory type according to the FMC pin definition in Table 12 of section 4 in the Datasheet for STM32F765xx, STM32F767xx, STM32F768Ax, STM32F769xx. Which memory types are used is defined by the pseudomodules periph_fmc_nor_sram, periph_fmc_nand and periph_fmc_sdram

Note: For easier handling the configuration structure does not take multiplexed address/data bits into account.

Definition at line 278 of file cpu_fmc.h.

#include <cpu_fmc.h>

Data Fields
uint8_t	bus
	AHB/APB bus.

uint32_t	rcc_mask
	Bit in clock enable register.

fmc_gpio_t	data [FMC_DATA_PIN_NUMOF]
	Data pins D0 ...

fmc_gpio_t	addr [FMC_ADDR_PIN_NUMOF]
	Address pins A0 ... if any.

fmc_gpio_t	nbl0_pin
	NBL0 pin.

fmc_gpio_t	nbl1_pin
	NBL1 pin.

fmc_gpio_t	nbl2_pin
	NBL2 pin.

fmc_gpio_t	nbl3_pin
	NBL3 pin.

fmc_gpio_t	nwait_pin
	NWAIT pin.

Field Documentation

◆ addr

fmc_gpio_t fmc_conf_t::addr[FMC_ADDR_PIN_NUMOF]

Address pins A0 ... if any.

Definition at line 283 of file cpu_fmc.h.

◆ bus

uint8_t fmc_conf_t::bus

AHB/APB bus.

Definition at line 279 of file cpu_fmc.h.

◆ data

fmc_gpio_t fmc_conf_t::data[FMC_DATA_PIN_NUMOF]

Data pins D0 ...

Definition at line 281 of file cpu_fmc.h.

◆ nbl0_pin

fmc_gpio_t fmc_conf_t::nbl0_pin

NBL0 pin.

Definition at line 286 of file cpu_fmc.h.

◆ nbl1_pin

fmc_gpio_t fmc_conf_t::nbl1_pin

NBL1 pin.

Definition at line 287 of file cpu_fmc.h.

◆ nbl2_pin

fmc_gpio_t fmc_conf_t::nbl2_pin

NBL2 pin.

Definition at line 288 of file cpu_fmc.h.

◆ nbl3_pin

fmc_gpio_t fmc_conf_t::nbl3_pin

NBL3 pin.

Definition at line 289 of file cpu_fmc.h.

◆ nwait_pin

fmc_gpio_t fmc_conf_t::nwait_pin

NWAIT pin.

Definition at line 290 of file cpu_fmc.h.

◆ rcc_mask

uint32_t fmc_conf_t::rcc_mask

Bit in clock enable register.

Definition at line 280 of file cpu_fmc.h.

The documentation for this struct was generated from the following file:

cpu/stm32/include/periph/cpu_fmc.h