Peripheral MCU configuration for the STM32F723E-DISCO board.
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Peripheral MCU configuration for the STM32F723E-DISCO board.
- Author
- Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr
Definition in file periph_conf.h.
#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_rtt_default.h"
#include "cfg_usb_otg_fs.h"
#include "lcd_fmc.h"
Go to the source code of this file.
◆ CONFIG_BOARD_HAS_HSE
#define CONFIG_BOARD_HAS_HSE 1 |
◆ CONFIG_BOARD_HAS_LSE
#define CONFIG_BOARD_HAS_LSE 1 |
◆ CONFIG_CLOCK_HSE
#define CONFIG_CLOCK_HSE MHZ(25) |
◆ FMC_BANK_NUMOF
◆ I2C_0_ISR
#define I2C_0_ISR isr_i2c2_er |
◆ I2C_1_ISR
#define I2C_1_ISR isr_i2c3_er |
◆ I2C_2_ISR
#define I2C_2_ISR isr_i2c1_er |
◆ I2C_NUMOF
◆ LCD_FMC_NUMOF
Number of LCDs using FMC banks.
Because it is used by the preprocessor it has to be a number. The ARRAY_SIZE can't be used here.
Definition at line 377 of file periph_conf.h.
◆ SPI_NUMOF
◆ TIMER_0_ISR
#define TIMER_0_ISR isr_tim2 |
◆ TIMER_NUMOF
◆ UART_0_ISR
#define UART_0_ISR (isr_usart6) |
◆ UART_1_ISR
#define UART_1_ISR (isr_usart2) |
◆ UART_2_ISR
◆ UART_3_ISR
#define UART_3_ISR (isr_uart7) |
◆ UART_4_ISR
◆ UART_NUMOF
◆ fmc_bank_config
FMC Bank configuration.
The board has a PSRAM IS66WV51216EBLL-55BLI with MBit on-board. It is organized in 512K x 16 bits and connected to bank 1, subbank 1 at address 0x60000000.
- Note
- A18 of the PSRAM is not used. Therefore, only 256K x 16 bits (512 kByte) of the 1 MByte PSRAM can be used.
The LCD display of the board is connected to bank 1, subbank2 at address 0x64000000.
Definition at line 310 of file periph_conf.h.
◆ fmc_config
◆ i2c_config
◆ lcd_fmc_desc
Initial value:= {
{
.cmd_offset = 0x0,
.data_offset = 0x2,
}
}
#define FMC_BANK_CONFIG(n)
Gives the configuration of n-th bank.
Descriptors of FMC banks used for LCDs.
Definition at line 363 of file periph_conf.h.
◆ spi_config
Initial value:= {
{
.dev = SPI1,
.rccmask = RCC_APB2ENR_SPI1EN,
},
{
.dev = SPI2,
.rccmask = RCC_APB1ENR_SPI2EN,
},
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
@ GPIO_AF5
use alternate function 5
#define SPI_CS_UNDEF
Define value for unused CS line.
@ APB1
Advanced Peripheral Bus 1
@ APB2
Advanced Peripheral Bus 2
Definition at line 204 of file periph_conf.h.
◆ timer_config
Initial value:= {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.irqn = TIM2_IRQn
}
}
Definition at line 55 of file periph_conf.h.
◆ uart_config