Cortex CMSIS style definition of MSP430 registers. More...
Cortex CMSIS style definition of MSP430 registers.
Definition in file msp430_regs_common.h.
#include <stdint.h>
Go to the source code of this file.
Data Structures | |
struct | msp430_port_t |
Common MSP GPIO Port Registers. More... | |
struct | msp430_port_p3_p6_t |
GPIO Port 3..6 (without interrupt functionality) More... | |
struct | msp430_timer_t |
Timer peripheral registers. More... | |
#define | REG8 volatile uint8_t |
Shortcut to specify 8-bit wide registers. | |
#define | REG16 volatile uint16_t |
Shortcut to specify 16-bit wide registers. | |
Timer SSEL Values | |
When using the macros in the vendor header files such as TASSEL_0 the actually used clock is non-obvious. Hence, provide aliases with obvious names. | |
#define | TXSSEL_TXCLK TASSEL_0 |
External TxCLK as clock source. | |
#define | TXSSEL_ACLK TASSEL_1 |
Auxiliary clock as clock source. | |
#define | TXSSEL_SMCLK TASSEL_2 |
Sub-system master clock as clock source. | |
#define | TXSSEL_INCLK TASSEL_3 |
External INCLK as clock source. | |
Timer Input Divider Values | |
The vendor header macros are again non-obvious in their naming, so provide better alias names. | |
#define | TXID_DIV_1 ID_0 |
Input Divider: Divide by 1. | |
#define | TXID_DIV_2 ID_1 |
Input Divider: Divide by 2. | |
#define | TXID_DIV_4 ID_2 |
Input Divider: Divide by 4. | |
#define | TXID_DIV_8 ID_3 |
Input Divider: Divide by 8. | |
#define | TXID_DIV_Msk ID_3 |
Mask to get the TXID field. | |
#define | TXID_DIV_Pos 6U |
Position of the TXID field. | |
#define | TXID_DIV_MAX 3 |
Maximum configuration value in the TXID field. | |
Timer Mode Control Values | |
The vendor header macros are again non-obvious in their naming, so provide better alies names. | |
#define | TXMC_STOP MC_0 |
Stop Mode. | |
#define | TXMC_UP MC_1 |
Up to CCR0 Mode. | |
#define | TXMC_CONT MC_2 |
Continuous Mode. | |
#define | TXMC_UP_DOWN MC_3 |
Up/Down Mode. | |
#define | TXMC_MASK MC_3 |
Bitmask to retrieve MC field. | |
#define REG16 volatile uint16_t |
Shortcut to specify 16-bit wide registers.
Definition at line 40 of file msp430_regs_common.h.
#define REG8 volatile uint8_t |
Shortcut to specify 8-bit wide registers.
Definition at line 35 of file msp430_regs_common.h.
#define TXID_DIV_1 ID_0 |
Input Divider: Divide by 1.
Definition at line 63 of file msp430_regs_common.h.
#define TXID_DIV_2 ID_1 |
Input Divider: Divide by 2.
Definition at line 64 of file msp430_regs_common.h.
#define TXID_DIV_4 ID_2 |
Input Divider: Divide by 4.
Definition at line 65 of file msp430_regs_common.h.
#define TXID_DIV_8 ID_3 |
Input Divider: Divide by 8.
Definition at line 66 of file msp430_regs_common.h.
#define TXID_DIV_MAX 3 |
Maximum configuration value in the TXID field.
Definition at line 69 of file msp430_regs_common.h.
#define TXID_DIV_Msk ID_3 |
Mask to get the TXID field.
Definition at line 67 of file msp430_regs_common.h.
#define TXID_DIV_Pos 6U |
Position of the TXID field.
Definition at line 68 of file msp430_regs_common.h.
#define TXMC_CONT MC_2 |
Continuous Mode.
Definition at line 81 of file msp430_regs_common.h.
#define TXMC_MASK MC_3 |
Bitmask to retrieve MC field.
Definition at line 83 of file msp430_regs_common.h.
#define TXMC_STOP MC_0 |
Stop Mode.
Definition at line 79 of file msp430_regs_common.h.
#define TXMC_UP MC_1 |
Up to CCR0 Mode.
Definition at line 80 of file msp430_regs_common.h.
#define TXMC_UP_DOWN MC_3 |
Up/Down Mode.
Definition at line 82 of file msp430_regs_common.h.
#define TXSSEL_ACLK TASSEL_1 |
Auxiliary clock as clock source.
Definition at line 51 of file msp430_regs_common.h.
#define TXSSEL_INCLK TASSEL_3 |
External INCLK as clock source.
Definition at line 53 of file msp430_regs_common.h.
#define TXSSEL_SMCLK TASSEL_2 |
Sub-system master clock as clock source.
Definition at line 52 of file msp430_regs_common.h.
#define TXSSEL_TXCLK TASSEL_0 |
External TxCLK as clock source.
Definition at line 50 of file msp430_regs_common.h.