nRF5x common definitions for handling peripherals More...

Detailed Description

nRF5x common definitions for handling peripherals

Author: Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de

#include "cpu.h"

Include dependency graph for periph_cpu_common.h:

Data Structures
union	gpio_conf_nrf5x
	GPIO pin configuration for nRF5x MCUs. More...

struct	timer_conf_t
	Timer device configuration. More...

struct	qdec_conf_t
	Quadrature decoder configuration struct. More...

struct	uart_conf_t
	UART device configuration. More...

struct	spi_conf_t
	SPI device configuration. More...

struct	i2c_conf_t
	I2C configuration structure. More...

Macros
#define	CPUID_ADDR (&NRF_FICR->DEVICEID[0])
	Starting offset of CPU_ID.

#define	CPUID_LEN (8U)
	Length of the CPU_ID in octets.

#define	PERIPH_TIMER_PROVIDES_SET 1
	The nRF5x periph_timer implements timer_set()

#define	TIMER_CHANNEL_NUMOF 5
	Maximum number of channels.

#define	UART_TXBUF_SIZE (64)
	Size of the UART TX buffer for non-blocking mode.

#define	USBDEV_CPU_DMA_ALIGNMENT (4)
	USBDEV buffers must be word aligned because of DMA restrictions.

#define	USBDEV_CPU_DMA_REQUIREMENTS __attribute__((aligned(USBDEV_CPU_DMA_ALIGNMENT)))
	USBDEV buffer instantiation requirement.

#define	SPI_SCKSEL (dev(bus)->PSEL.SCK)
	Redefine some peripheral names to unify them across nRF families.

#define	SPI_MOSISEL (dev(bus)->PSEL.MOSI)
	Macro for SPI mosi.

#define	SPI_MISOSEL (dev(bus)->PSEL.MISO)
	Macro for SPI miso.

#define	CONFIG_SPI_MBUF_SIZE 64
	Size of the UART TX buffer for non-blocking mode.

Typedefs
typedef void(*	shared_irq_cb_t) (void *arg)
	Common UART/SPI/I2C interrupt callback.

Functions
uint8_t	gpio_int_get_exti (gpio_t pin)
	Retrieve the exti(GPIOTE) channel associated with a gpio.

void	shared_irq_register_spi (NRF_SPIM_Type bus, shared_irq_cb_t cb, void arg)
	Register a SPI IRQ handler for a shared UART/I2C/SPI irq vector.

void	shared_irq_register_i2c (NRF_TWIM_Type bus, shared_irq_cb_t cb, void arg)
	Register an I2C IRQ handler for a shared UART/I2C/SPI irq vector.

void	shared_irq_register_uart (NRF_UARTE_Type bus, shared_irq_cb_t cb, void arg)
	Register an UART IRQ handler for a shared UART/I2C/SPI irq vector.

void	nrf5x_i2c_acquire (NRF_TWIM_Type bus, shared_irq_cb_t cb, void arg)
	Acquire the shared I2C/SPI peripheral in I2C mode.

void	nrf5x_i2c_release (NRF_TWIM_Type *bus)
	Release the shared I2C/SPI peripheral in I2C mode.

void	nrf5x_spi_acquire (NRF_SPIM_Type bus, shared_irq_cb_t cb, void arg)
	Acquire the shared I2C/SPI peripheral in SPI mode.

void	nrf5x_spi_release (NRF_SPIM_Type *bus)
	Acquire the shared I2C/SPI peripheral in SPI mode.

Override macro for defining GPIO pins
The port definition is used (and zeroed) to suppress compiler warnings
#define	GPIO_PIN(x, y) ((x & 0) \| y)

#define	GPIO_UNDEF (UINT8_MAX)
	Override GPIO_UNDEF value.

#define	ISR_GPIOTE isr_gpiote
	Wrapper around GPIOTE ISR.

#define	GPIO_MODE(oe, ic, pr, dr) (oe \| (ic << 1) \| (pr << 2) \| (dr << 8))
	Generate GPIO mode bitfields.

#define	SPI_HWCS(x) (SPI_CS_UNDEF)
	No support for HW chip select...

#define	PERIPH_SPI_NEEDS_INIT_CS
	Declare needed shared SPI functions.

#define	PERIPH_SPI_NEEDS_TRANSFER_BYTE

#define	PERIPH_SPI_NEEDS_TRANSFER_REG

#define	PERIPH_SPI_NEEDS_TRANSFER_REGS

WDT upper and lower bound times in ms
#define	NWDT_TIME_LOWER_LIMIT (1)

#define	NWDT_TIME_UPPER_LIMIT ((UINT32_MAX >> 15) * US_PER_MS + 1)

Define macros for sda and scl pin to be able to reinitialize them
#define	i2c_pin_sda(dev) i2c_config[dev].sda
	Macro for getting SDA pin.

#define	i2c_pin_scl(dev) i2c_config[dev].scl
	Macro for getting SCL pin.

Macro Definition Documentation

◆ CONFIG_SPI_MBUF_SIZE

#define CONFIG_SPI_MBUF_SIZE 64

Size of the UART TX buffer for non-blocking mode.

SPI temporary buffer size for storing const data in RAM before initiating DMA transfer

Definition at line 573 of file periph_cpu_common.h.

◆ CPUID_ADDR

#define CPUID_ADDR (&NRF_FICR->DEVICEID[0])

Starting offset of CPU_ID.

Definition at line 56 of file periph_cpu_common.h.

◆ CPUID_LEN

#define CPUID_LEN (8U)

Length of the CPU_ID in octets.

Definition at line 61 of file periph_cpu_common.h.

◆ GPIO_MODE

#define GPIO_MODE	(	oe,
		ic,
		pr,
		dr
	)	(oe \| (ic << 1) \| (pr << 2) \| (dr << 8))

Generate GPIO mode bitfields.

We use 4 bit to encode the pin mode:

bit 0: output enable
bit 1: input connect
bit 2+3: pull resistor configuration
bit 8+9+10: drive configuration

Definition at line 102 of file periph_cpu_common.h.

◆ GPIO_PIN

#define GPIO_PIN	(	x,
		y
	)	((x & 0) \| y)

Definition at line 71 of file periph_cpu_common.h.

◆ GPIO_UNDEF

#define GPIO_UNDEF (UINT8_MAX)

Override GPIO_UNDEF value.

Definition at line 79 of file periph_cpu_common.h.

◆ i2c_pin_scl

#define i2c_pin_scl ( dev ) i2c_config[dev].scl

Macro for getting SCL pin.

Definition at line 617 of file periph_cpu_common.h.

◆ i2c_pin_sda

#define i2c_pin_sda ( dev ) i2c_config[dev].sda

Macro for getting SDA pin.

Definition at line 616 of file periph_cpu_common.h.

◆ ISR_GPIOTE

#define ISR_GPIOTE isr_gpiote

Wrapper around GPIOTE ISR.

Note: nRF53 has two GPIOTE instances available on Application Core but we always use the first one.

Definition at line 90 of file periph_cpu_common.h.

◆ NWDT_TIME_LOWER_LIMIT

#define NWDT_TIME_LOWER_LIMIT (1)

Definition at line 360 of file periph_cpu_common.h.

◆ NWDT_TIME_UPPER_LIMIT

#define NWDT_TIME_UPPER_LIMIT ((UINT32_MAX >> 15) * US_PER_MS + 1)

Definition at line 362 of file periph_cpu_common.h.

◆ PERIPH_I2C_NEED_READ_REG

#define PERIPH_I2C_NEED_READ_REG

Definition at line 608 of file periph_cpu_common.h.

◆ PERIPH_I2C_NEED_WRITE_REG

#define PERIPH_I2C_NEED_WRITE_REG

Definition at line 609 of file periph_cpu_common.h.

◆ PERIPH_SPI_NEEDS_INIT_CS

#define PERIPH_SPI_NEEDS_INIT_CS

Declare needed shared SPI functions.

Definition at line 246 of file periph_cpu_common.h.

◆ PERIPH_SPI_NEEDS_TRANSFER_BYTE

#define PERIPH_SPI_NEEDS_TRANSFER_BYTE

Definition at line 247 of file periph_cpu_common.h.

◆ PERIPH_SPI_NEEDS_TRANSFER_REG

#define PERIPH_SPI_NEEDS_TRANSFER_REG

Definition at line 248 of file periph_cpu_common.h.

◆ PERIPH_SPI_NEEDS_TRANSFER_REGS

#define PERIPH_SPI_NEEDS_TRANSFER_REGS

Definition at line 249 of file periph_cpu_common.h.

◆ PERIPH_TIMER_PROVIDES_SET

#define PERIPH_TIMER_PROVIDES_SET 1

The nRF5x periph_timer implements timer_set()

Definition at line 315 of file periph_cpu_common.h.

◆ PROVIDES_PM_OFF

#define PROVIDES_PM_OFF

Definition at line 47 of file periph_cpu_common.h.

◆ SPI_HWCS

#define SPI_HWCS ( x ) (SPI_CS_UNDEF)

No support for HW chip select...

Definition at line 240 of file periph_cpu_common.h.

◆ SPI_MISOSEL

#define SPI_MISOSEL (dev(bus)->PSEL.MISO)

Macro for SPI miso.

Definition at line 477 of file periph_cpu_common.h.

◆ SPI_MOSISEL

#define SPI_MOSISEL (dev(bus)->PSEL.MOSI)

Macro for SPI mosi.

Definition at line 476 of file periph_cpu_common.h.

◆ SPI_SCKSEL

#define SPI_SCKSEL (dev(bus)->PSEL.SCK)

Redefine some peripheral names to unify them across nRF families.

Macro for SPI clk

Definition at line 475 of file periph_cpu_common.h.

◆ TIMER_CHANNEL_NUMOF

#define TIMER_CHANNEL_NUMOF 5

Maximum number of channels.

Note: NRF_TIMER1 and NRF_TIMER2 only have 4 hardware channels (and 3 of of them are available to the application, as one has to be used to implement timer_read()). Use timer_query_channel_numof to check the actual number of supported channels for a given timer.

Definition at line 325 of file periph_cpu_common.h.

◆ UART_TXBUF_SIZE

#define UART_TXBUF_SIZE (64)

Size of the UART TX buffer for non-blocking mode.

Definition at line 409 of file periph_cpu_common.h.

◆ USBDEV_CPU_DMA_ALIGNMENT

#define USBDEV_CPU_DMA_ALIGNMENT (4)

USBDEV buffers must be word aligned because of DMA restrictions.

Definition at line 415 of file periph_cpu_common.h.

◆ USBDEV_CPU_DMA_REQUIREMENTS

#define USBDEV_CPU_DMA_REQUIREMENTS __attribute__((aligned(USBDEV_CPU_DMA_ALIGNMENT)))

USBDEV buffer instantiation requirement.

Definition at line 420 of file periph_cpu_common.h.

Typedef Documentation

◆ shared_irq_cb_t

typedef void(* shared_irq_cb_t) (void *arg)

Common UART/SPI/I2C interrupt callback.

Parameters

arg	Opaque context pointer

Definition at line 497 of file periph_cpu_common.h.

Function Documentation

◆ gpio_int_get_exti()

uint8_t gpio_int_get_exti ( gpio_t pin )

Retrieve the exti(GPIOTE) channel associated with a gpio.

Parameters

pin	GPIO pin to retrieve the channel for

Returns: the channel number; 0xff if no channel is found

◆ nrf5x_i2c_acquire()

void nrf5x_i2c_acquire	(	NRF_TWIM_Type *	bus,
		shared_irq_cb_t	cb,
		void *	arg
	)

Acquire the shared I2C/SPI peripheral in I2C mode.

Parameters

bus	bus to acquire exclusive access on
cb	ISR handler to call on IRQ
arg	ISR handler argument

◆ nrf5x_i2c_release()

void nrf5x_i2c_release ( NRF_TWIM_Type * bus )

Release the shared I2C/SPI peripheral in I2C mode.

Parameters

bus	bus to release exclusive access on

◆ nrf5x_spi_acquire()

void nrf5x_spi_acquire	(	NRF_SPIM_Type *	bus,
		shared_irq_cb_t	cb,
		void *	arg
	)

Acquire the shared I2C/SPI peripheral in SPI mode.

Parameters

bus	bus to release exclusive access on
cb	ISR handler to call on IRQ
arg	ISR handler argument

◆ nrf5x_spi_release()

void nrf5x_spi_release ( NRF_SPIM_Type * bus )

Acquire the shared I2C/SPI peripheral in SPI mode.

Parameters

bus	bus to release exclusive access on

◆ shared_irq_register_i2c()

void shared_irq_register_i2c	(	NRF_TWIM_Type *	bus,
		shared_irq_cb_t	cb,
		void *	arg
	)

Register an I2C IRQ handler for a shared UART/I2C/SPI irq vector.

Parameters

bus	bus to register the IRQ handler on
cb	callback to call on IRQ
arg	Argument to pass to the handler

◆ shared_irq_register_spi()

void shared_irq_register_spi	(	NRF_SPIM_Type *	bus,
		shared_irq_cb_t	cb,
		void *	arg
	)

Register a SPI IRQ handler for a shared UART/I2C/SPI irq vector.

Parameters

bus	bus to register the IRQ handler on
cb	callback to call on IRQ
arg	Argument to pass to the handler

◆ shared_irq_register_uart()

void shared_irq_register_uart	(	NRF_UARTE_Type *	bus,
		shared_irq_cb_t	cb,
		void *	arg
	)

Register an UART IRQ handler for a shared UART/I2C/SPI irq vector.

Parameters

bus	bus to register the IRQ handler on
cb	callback to call on IRQ
arg	Argument to pass to the handler

Detailed Description

Data Structures

Macros

Typedefs

Functions

Override macro for defining GPIO pins

WDT upper and lower bound times in ms

Define macros for sda and scl pin to be able to reinitialize them

Macro Definition Documentation

◆ CONFIG_SPI_MBUF_SIZE

◆ CPUID_ADDR

◆ CPUID_LEN

◆ GPIO_MODE

◆ GPIO_PIN

◆ GPIO_UNDEF

◆ i2c_pin_scl

◆ i2c_pin_sda

◆ ISR_GPIOTE

◆ NWDT_TIME_LOWER_LIMIT

◆ NWDT_TIME_UPPER_LIMIT

◆ PERIPH_I2C_NEED_READ_REG

◆ PERIPH_I2C_NEED_WRITE_REG

◆ PERIPH_SPI_NEEDS_INIT_CS

◆ PERIPH_SPI_NEEDS_TRANSFER_BYTE

◆ PERIPH_SPI_NEEDS_TRANSFER_REG

◆ PERIPH_SPI_NEEDS_TRANSFER_REGS

◆ PERIPH_TIMER_PROVIDES_SET

◆ PROVIDES_PM_OFF

◆ SPI_HWCS

◆ SPI_MISOSEL

◆ SPI_MOSISEL

◆ SPI_SCKSEL

◆ TIMER_CHANNEL_NUMOF

◆ UART_TXBUF_SIZE

◆ USBDEV_CPU_DMA_ALIGNMENT

◆ USBDEV_CPU_DMA_REQUIREMENTS

Typedef Documentation

◆ shared_irq_cb_t

Function Documentation

◆ gpio_int_get_exti()

◆ nrf5x_i2c_acquire()

◆ nrf5x_i2c_release()

◆ nrf5x_spi_acquire()

◆ nrf5x_spi_release()

◆ shared_irq_register_i2c()

◆ shared_irq_register_spi()

◆ shared_irq_register_uart()