MSP430 x1xx SPI configuration, CPU level. More...

Detailed Description

MSP430 x1xx SPI configuration, CPU level.

The MSP430 x1xx has two USART peripherals which both can be operated in SPI mode. Each is connected to a fixed GPIO for COPI (MOSI), CIPO (MISO), and SCK, respectively. Hence, there is not much left for the board to configure anyway, so we just prepare UART configurations at CPU level for the board to refer to. The unused configuration(s) will be garbage collected by the linker.

Definition at line 185 of file periph_cpu.h.

#include <periph_cpu.h>

Data Fields
msp430_usart_params_t	usart_params
	The USART parameters.

uint8_t	enable_mask
	The bitmask to write to the SFR register to enable the USART device in SPI mode.

gpio_t	miso
	CIPO (MISO) pin.

gpio_t	mosi
	COPI (MOSI) pin.

gpio_t	sck
	SCK pin.

Field Documentation

◆ enable_mask

uint8_t msp430_usart_spi_params_t::enable_mask

The bitmask to write to the SFR register to enable the USART device in SPI mode.

Note: Sadly, the layout of the SFR registers corresponding to the USART peripherals differs.

Definition at line 194 of file periph_cpu.h.

◆ miso

gpio_t msp430_usart_spi_params_t::miso

CIPO (MISO) pin.

Definition at line 195 of file periph_cpu.h.

◆ mosi

gpio_t msp430_usart_spi_params_t::mosi

COPI (MOSI) pin.

Definition at line 196 of file periph_cpu.h.

◆ sck

gpio_t msp430_usart_spi_params_t::sck

SCK pin.

Definition at line 197 of file periph_cpu.h.

◆ usart_params

msp430_usart_params_t msp430_usart_spi_params_t::usart_params

The USART parameters.

Definition at line 186 of file periph_cpu.h.

The documentation for this struct was generated from the following file:

cpu/msp430/include/x1xx/periph_cpu.h