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periph_conf.h File Reference

Peripheral MCU configuration for the nucleo-u575zi-q board. More...

Detailed Description

Peripheral MCU configuration for the nucleo-u575zi-q board.

Author
Nils Ollrogge nils..nosp@m.ollr.nosp@m.ogge@.nosp@m.mail.nosp@m.box.t.nosp@m.u-dr.nosp@m.esden.nosp@m..de

Definition in file periph_conf.h.

#include "cfg_timer_tim5.h"
#include "cfg_usb_otg_fs_u5.h"
#include "clk_conf.h"
#include "periph_cpu.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

#define CONFIG_BOARD_HAS_LSE   1
 

UART configuration

#define UART_0_ISR   (isr_usart1)
 
#define UART_1_ISR   (isr_lpuart1)
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

SPI configuration

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const spi_conf_t spi_config []
 

I2C configuration

#define I2C_0_ISR   isr_i2c1_er
 
#define I2C_1_ISR   isr_i2c2_er
 
#define I2C_NUMOF   ARRAY_SIZE(i2c_config)
 
static const i2c_conf_t i2c_config []
 

PWM configuration

To find appriopate device and channel find in the MCU datasheet table concerning "Alternate function AF0 to AF7" a text similar to TIM[X]_CH[Y], where: TIM[X] - is device, [Y] - describes used channel (indexed from 0), for example TIM2_CH1 is channel 0 in configuration structure (cc_chan - field), Port column in the table describes connected port.

For Nucleo-U575ZI-Q this information is in the datasheet, Table 27, page 127.

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)
 
static const pwm_conf_t pwm_config []
 

Macro Definition Documentation

◆ CONFIG_BOARD_HAS_LSE

#define CONFIG_BOARD_HAS_LSE   1

Definition at line 24 of file periph_conf.h.

◆ I2C_0_ISR

#define I2C_0_ISR   isr_i2c1_er

Definition at line 127 of file periph_conf.h.

◆ I2C_1_ISR

#define I2C_1_ISR   isr_i2c2_er

Definition at line 128 of file periph_conf.h.

◆ I2C_NUMOF

#define I2C_NUMOF   ARRAY_SIZE(i2c_config)

Definition at line 129 of file periph_conf.h.

◆ PWM_NUMOF

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)

Definition at line 174 of file periph_conf.h.

◆ SPI_NUMOF

#define SPI_NUMOF   ARRAY_SIZE(spi_config)

Definition at line 93 of file periph_conf.h.

◆ UART_0_ISR

#define UART_0_ISR   (isr_usart1)

Definition at line 67 of file periph_conf.h.

◆ UART_1_ISR

#define UART_1_ISR   (isr_lpuart1)

Definition at line 68 of file periph_conf.h.

◆ UART_NUMOF

#define UART_NUMOF   ARRAY_SIZE(uart_config)

Definition at line 70 of file periph_conf.h.

Variable Documentation

◆ i2c_config

const i2c_conf_t i2c_config[]
static
Initial value:
= {
{
.dev = I2C1,
.speed = I2C_SPEED_NORMAL,
.scl_pin = GPIO_PIN(PORT_B, 8),
.sda_pin = GPIO_PIN(PORT_B, 9),
.scl_af = GPIO_AF4,
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR1_I2C1EN,
.rcc_sw_mask = RCC_CCIPR1_I2C1SEL_1,
.irqn = I2C1_ER_IRQn,
},
{
.dev = I2C2,
.speed = I2C_SPEED_NORMAL,
.scl_pin = GPIO_PIN(PORT_F, 1),
.sda_pin = GPIO_PIN(PORT_F, 0),
.scl_af = GPIO_AF4,
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR1_I2C2EN,
.rcc_sw_mask = RCC_CCIPR1_I2C2SEL_1,
.irqn = I2C2_ER_IRQn,
},
}
@ PORT_B
port B
Definition periph_cpu.h:48
@ PORT_F
port F
Definition periph_cpu.h:52
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:278
@ GPIO_AF4
use alternate function 4
Definition cpu_gpio.h:106
@ APB1
Advanced Peripheral Bus 1
Definition periph_cpu.h:79

Definition at line 100 of file periph_conf.h.

◆ pwm_config

const pwm_conf_t pwm_config[]
static
Initial value:
= {
{ .dev = TIM2,
.rcc_mask = RCC_APB1ENR1_TIM2EN,
.chan = { { .pin = GPIO_PIN(PORT_A, 0) , .cc_chan = 0 },
{ .pin = GPIO_PIN(PORT_A, 1) , .cc_chan = 1 },
{ .pin = GPIO_PIN(PORT_A, 2) , .cc_chan = 2 },
{ .pin = GPIO_PIN(PORT_A, 3) , .cc_chan = 3 } },
.af = GPIO_AF1,
.bus = APB1 },
{ .dev = TIM3,
.rcc_mask = RCC_APB1ENR1_TIM3EN,
.chan = { { .pin = GPIO_PIN(PORT_B, 4) , .cc_chan = 0 },
{ .pin = GPIO_PIN(PORT_B, 5) , .cc_chan = 1 },
{ .pin = GPIO_PIN(PORT_B, 0) , .cc_chan = 2 },
{ .pin = GPIO_PIN(PORT_B, 1) , .cc_chan = 3 } },
.af = GPIO_AF2,
.bus = APB1 },
{ .dev = TIM4,
.rcc_mask = RCC_APB1ENR1_TIM4EN,
.chan = { { .pin = GPIO_PIN(PORT_D, 12) , .cc_chan = 0 },
{ .pin = GPIO_PIN(PORT_B, 7) , .cc_chan = 1 },
{ .pin = GPIO_PIN(PORT_D, 14) , .cc_chan = 2 },
{ .pin = GPIO_PIN(PORT_D, 15) , .cc_chan = 3 } },
.af = GPIO_AF2,
.bus = APB1 },
}
@ PORT_A
port A
Definition periph_cpu.h:47
@ PORT_D
port D
Definition periph_cpu.h:50
@ GPIO_AF1
use alternate function 1
Definition cpu_gpio.h:103
@ GPIO_AF2
use alternate function 2
Definition cpu_gpio.h:104

Definition at line 147 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
},
}
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ GPIO_AF5
use alternate function 5
Definition cpu_gpio.h:107
@ APB2
Advanced Peripheral Bus 2
Definition periph_cpu.h:80

Definition at line 77 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static
Initial value:
= {
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB2,
.irqn = USART1_IRQn,
.type = STM32_USART,
.clk_src = 0,
},
{
.dev = LPUART1,
.rcc_mask = RCC_APB3ENR_LPUART1EN,
.rx_pin = GPIO_PIN(PORT_G, 8),
.tx_pin = GPIO_PIN(PORT_G, 7),
.rx_af = GPIO_AF8,
.tx_af = GPIO_AF8,
.bus = APB3,
.irqn = LPUART1_IRQn,
.type = STM32_LPUART,
.clk_src = 0,
},
}
@ PORT_G
port G
Definition periph_cpu.h:53
@ GPIO_AF8
use alternate function 8
Definition cpu_gpio.h:111
@ GPIO_AF7
use alternate function 7
Definition cpu_gpio.h:109
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition cpu_uart.h:39
@ STM32_USART
STM32 USART module type.
Definition cpu_uart.h:38

Definition at line 40 of file periph_conf.h.